From: Andrey Miroshnikov <andrey@technepisteme.xyz>
Date: Wed, 20 Sep 2023 16:44:03 +0000 (+0000)
Subject: Added a diagram of bugs for ongoing grant
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f76aeabdc7542d0a2fd51fdbd2ef86a40bd45682;p=libreriscv.git

Added a diagram of bugs for ongoing grant
---

diff --git a/nlnet_2022_ongoing/discussion.mdwn b/nlnet_2022_ongoing/discussion.mdwn
index d37bed24d..81c2f0439 100644
--- a/nlnet_2022_ongoing/discussion.mdwn
+++ b/nlnet_2022_ongoing/discussion.mdwn
@@ -1,3 +1,58 @@
+# 20th Sep 2023
+
+Current diagram for ongoing grant, no changes made anywhere.
+
+    Bug 961 - NLnet 2022 Libre-SOC "ongoing" milestone 2022-08-107 (approved, MoU TBD) - 100000
+    |
+    |-| (IN PROGRESS) Bug 737 - in-order single-issue Power ISA 3.0 core - 7000
+    | |- (NOT STARTED) Bug 1036 - Formal Proof for LDSTCompUnit is needed - 3000
+    | |- (DONE) Bug 1073 - Microwatt verilator sim - setting up chroot and documentation
+    | |- (NOT STARTED) Bug 1149 - simplify the in-order core "multi-bit-masks" down to a single bit-vector - 3250
+    |
+    |-- (DONE) Bug 999 - SFFS Operating System Porting - 10000
+    |
+    |-| (IN PROGRESS) Bug 1003 - instruction database continuation and binutils, SVP64 - 10500
+    | |- (DONE) Bug 1068 - add instructions from ls012 not currently implemented in binutils - 3800
+    | |- (IN PROGRESS) Bug 1079 - make LD/ST-with-update EXTRA3 - 2000
+    | |- (IN PROGRESS) Bug 1083 - update to DD FFirst Mode binutils PowerDecoder - 700
+    | |- (DONE) Bug 1094 - insndb instruction database visitor-walker is needed - 4000
+    |
+    |-- (NOT STARTED) Bug 1024 - Second phase of nmigen Dynamic Partitioned SIMD and nmigen language improvements - 6000
+    |
+    |-| (IN PROGRESS) Bug 1026 - implement Draft Instructions in nmigen HDL - 8000
+    | |- (DONE) Bug 1072 - implement fcvt/fmv instructions in ISACaller (ls006) - 3000
+    | |- Unallocated 5000EUR
+    |
+    |-| (IN PROGRESS) Bug 1027 - implement "necessary" additions to SVP64 and Scalar Power ISA - 24000
+    | |- (CONFIRMED, NOT STARTED) Bug 852 - implement grevlut* - 2000
+    | |- (DONE) Bug 972 - addme/subfme carry/overflow is incorrect - 1000
+    | |- (DONE) Bug 1028 - implement integer-versions of fft/dct "butterfly" instructions in ISACaller Simulator - 4000
+    | |- (DONE) Bug 1030 - Enable compilation of PyPowersim on non-power platforms. - 2000
+    | |- (CONFIRMED, NOT STARTED) Bug 1031 - implement CRweird instructions in ISACaller - 3000
+    | |- (CONFIRMED, NOT STARTED) Bug 1034 - implement crternlogi crbinlut and binlut in ISACaller - 3000
+    | |- (IN PROGRESS) Bug 1047 - SVP64 LD/ST Data-Dependent Fail-First providing linked-list walking - 3000
+    | |- (IN PROGRESS) Bug 1061 - change extsb/h/w definitions to scale input size with XLEN rather than convert from fixed sizes - 1000
+    | |- (DONE) Bug 1064 - Change XLEN-ification - 1000
+    | |- (CONFIRMED, IN PROGRESS) Bug 1071 - add parallel prefix sum remap mode - 2000
+    | |- (CONFIRMED, IN PROGRESS) Bug 1116 - evaluate, spec, and implement Vector-Immediates in SVP64 Normal - 2000
+    |
+    |-- (CONFIRMED, NOT STARTED) Bug 1032 - Implementation of SVP64 features: elwidth overrides and REMAP - 8000
+    |
+    |-- (CONFIRMED, NOT STARTED) Bug 1033 - Implementation and enhancement of "Test API" - 2500
+    |
+    |-| (IN PROGRESS) Bug 1035 - Implement Scalar Power ISA v3.1 (32-bit-only) instructions (no PO1) in ISACaller - 7000
+    | |- (DONE) Bug 1120 - Add all scalar 32-bit v3.1 insns to ISACaller - 2000
+    | |- (CONFIRMED, NOT STARTED) Bug 1147 - support Scalar Power ISA v3.1 (32-bit-only) instructions (no PO1) in binutils - 1000
+    |
+    |-| (CONFIRMED, NOT STARTED) Bug 1037 - improvements of Libre-SOC core support on FPGA boards - 6000
+    | |- (CONFIRMED, IN PROGRESS) Bug 990 - gram needs changes to work on the orangecrab - 4500
+    | |- (CONFIRMED, IN PROGRESS) Bug 1004 - FPGA bring up for platform definitions - 1500
+    |
+    |-- (IN PROGRESS) Bug 1039 - add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core - 3000
+    |
+    |-- (CONFIRMED, NOT STARTED) Bug 1150 - implement PO9 changeover and associated tasks - 8000
+
+
 # Meeting 30th aug 2023 16:00 UTC
 
 * Checked TOML fields and participants in bugs: 961, 1035, 1068, 1083, 1119, 1120, 1123,