From: Joey Ye Date: Wed, 14 Jan 2015 08:17:15 +0000 (+0000) Subject: arm.c (arm_compute_save_reg_mask): Do not save lr in case of tail call. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f7d2b51386ac44e68b07a2dac212a70d1bda0b02;p=gcc.git arm.c (arm_compute_save_reg_mask): Do not save lr in case of tail call. 2015-01-14 Joey Ye * config/arm/arm.c (arm_compute_save_reg_mask): Do not save lr in case of tail call. * config/arm/thumb2.md (*thumb2_pop_single): New pattern. From-SVN: r219578 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dd6ad6bd78e..7a0a9a3b096 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-01-14 Joey Ye + + * config/arm/arm.c (arm_compute_save_reg_mask): + Do not save lr in case of tail call. + * config/arm/thumb2.md (*thumb2_pop_single): New pattern. + 2015-01-13 Martin Uecker * tree-vrp.c (check_array_ref): Emit more warnings @@ -26,7 +32,7 @@ (gimple_init_edge_profiler): Likewise. (gimple_gen_ic_func_profiler): Likewise. -2015-01-15 Naveen H.S +2015-01-13 Naveen H.S * ipa-inline.c (inline_small_functions): Swap the operands in enum. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 8ca2dd8de8a..1a92753d52f 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -19191,6 +19191,7 @@ arm_compute_save_reg_mask (void) || (save_reg_mask && optimize_size && ARM_FUNC_TYPE (func_type) == ARM_FT_NORMAL + && !crtl->tail_call_emit && !crtl->calls_eh_return)) save_reg_mask |= 1 << LR_REGNUM; diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 94d3225dde5..1f681479d5d 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -267,6 +267,17 @@ (set_attr "type" "multiple")] ) +;; Pop a single register as its size is preferred over a post-incremental load +(define_insn "*thumb2_pop_single" + [(set (match_operand:SI 0 "low_register_operand" "=r") + (mem:SI (post_inc:SI (reg:SI SP_REGNUM))))] + "TARGET_THUMB2 && (reload_in_progress || reload_completed)" + "pop\t{%0}" + [(set_attr "type" "load1") + (set_attr "length" "2") + (set_attr "predicable" "yes")] +) + ;; We have two alternatives here for memory loads (and similarly for stores) ;; to reflect the fact that the permissible constant pool ranges differ ;; between ldr instructions taking low regs and ldr instructions taking high