From: Richard Henderson Date: Fri, 11 Mar 2005 17:50:30 +0000 (-0800) Subject: re PR target/20415 (Vector init builtin produces invalid instruction pshufw) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f817d5d47008f94b9ea1a20daf8707ac7e7a9058;p=gcc.git re PR target/20415 (Vector init builtin produces invalid instruction pshufw) PR target/20415 * config/i386/mmx.md (vec_dupv4hi): Fix predicate. * config/i386/i386.c (ix86_expand_vector_init_duplicate): Update to match. From-SVN: r96304 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4944b6cbe5d..5c2b620571a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2005-03-11 Richard Henderson + + PR target/20415 + * config/i386/mmx.md (vec_dupv4hi): Fix predicate. + * config/i386/i386.c (ix86_expand_vector_init_duplicate): Update + to match. + 2005-03-11 Richard Sandiford * config/mips/mips.h (mips_fix_vr4130_string): Declare. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index bc680c80df9..7ca47ed2f4b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -16198,11 +16198,21 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, case V4HImode: if (!mmx_ok) return false; - val = gen_lowpart (SImode, val); - x = gen_rtx_TRUNCATE (HImode, val); - x = gen_rtx_VEC_DUPLICATE (mode, x); - emit_insn (gen_rtx_SET (VOIDmode, target, x)); - return true; + if (TARGET_SSE || TARGET_3DNOW_A) + { + val = gen_lowpart (SImode, val); + x = gen_rtx_TRUNCATE (HImode, val); + x = gen_rtx_VEC_DUPLICATE (mode, x); + emit_insn (gen_rtx_SET (VOIDmode, target, x)); + return true; + } + else + { + smode = HImode; + wsmode = SImode; + wvmode = V2SImode; + goto widen; + } case V8QImode: if (!mmx_ok) diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 9e374e44ebf..403501bf4dc 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1111,7 +1111,7 @@ (vec_duplicate:V4HI (truncate:HI (match_operand:SI 1 "register_operand" "0"))))] - "TARGET_MMX" + "TARGET_SSE || TARGET_3DNOW_A" "pshufw\t{$0, %0, %0|%0, %0, 0}" [(set_attr "type" "mmxcvt") (set_attr "mode" "DI")])