From: Jakub Jelinek <jakub@redhat.com>
Date: Fri, 18 Jan 2019 09:15:36 +0000 (+0100)
Subject: re PR target/88734 (AArch64's ACLE intrinsics give an ICE instead of compile error... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f84c606775447a2c28a26ae234008bdceaedfbf9;p=gcc.git

re PR target/88734 (AArch64's ACLE intrinsics give an ICE instead of compile error when option mismatch.)

	PR target/88734
	* config/arm/arm_neon.h: Fix #pragma GCC target syntax - replace
	(("..."))) with ("...").

From-SVN: r268064
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9018b8f0099..c24e54d743a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-01-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/88734
+	* config/arm/arm_neon.h: Fix #pragma GCC target syntax - replace
+	(("..."))) with ("...").
+
 2019-01-18  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 
 	* doc/extend.texi (Built-in Functions for Memory Model Aware
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index 3cc2179ddee..0b60c4b20f6 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -18310,12 +18310,12 @@ vfmlsl_laneq_high_u32 (float32x2_t __r, float16x4_t __a, float16x8_t __b,
 /* AdvSIMD Complex numbers intrinsics.  */
 #if __ARM_ARCH >= 8
 #pragma GCC push_options
-#pragma GCC target(("arch=armv8.3-a"))
+#pragma GCC target ("arch=armv8.3-a")
 
 
 #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
 #pragma GCC push_options
-#pragma GCC target(("+fp16"))
+#pragma GCC target ("+fp16")
 __extension__ extern __inline float16x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vcadd_rot90_f16 (float16x4_t __a, float16x4_t __b)