From: Eddie Hung <eddie@fpgeh.com>
Date: Sat, 15 Feb 2020 16:29:10 +0000 (-0800)
Subject: Cleanup tests
X-Git-Tag: working-ls180~780^2~13
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f858219c4ed18fb5886641efd1e71f5aad0b1c84;p=yosys.git

Cleanup tests
---

diff --git a/tests/arch/xilinx/bug1480.ys b/tests/arch/xilinx/bug1480.ys
new file mode 100644
index 000000000..84faea08a
--- /dev/null
+++ b/tests/arch/xilinx/bug1480.ys
@@ -0,0 +1,18 @@
+read_verilog << EOF
+module top(...);
+
+input signed [17:0] A;
+input signed [17:0] B;
+output X;
+output Y;
+
+wire [35:0] P;
+assign P = A * B;
+
+assign X = P[0];
+assign Y = P[35];
+
+endmodule
+EOF
+
+synth_xilinx
diff --git a/tests/various/bug1480.ys b/tests/various/bug1480.ys
deleted file mode 100644
index 84faea08a..000000000
--- a/tests/various/bug1480.ys
+++ /dev/null
@@ -1,18 +0,0 @@
-read_verilog << EOF
-module top(...);
-
-input signed [17:0] A;
-input signed [17:0] B;
-output X;
-output Y;
-
-wire [35:0] P;
-assign P = A * B;
-
-assign X = P[0];
-assign Y = P[35];
-
-endmodule
-EOF
-
-synth_xilinx
diff --git a/tests/various/pmux2shiftx.v b/tests/various/pmux2shiftx.v
index 563394080..c1994e92c 100644
--- a/tests/various/pmux2shiftx.v
+++ b/tests/various/pmux2shiftx.v
@@ -33,7 +33,7 @@ module pmux2shiftx_test (
 	end
 endmodule
 
-module issue01135(input [7:0] i, output o);
+module issue01135(input [7:0] i, output reg o);
 always @*
 case (i[6:3])
     4: o <= i[0];