From: Jason Ekstrand Date: Wed, 1 Mar 2017 01:21:12 +0000 (-0800) Subject: i965: Move SOL binding #defines to brw_compiler.h X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f85ef1150125d4335c935ed8fb66071690d6fd6d;p=mesa.git i965: Move SOL binding #defines to brw_compiler.h While we're at it, we also change the GEN6 binding macro to be a start index that gets added to the binding. This makes things a bit more explicit. Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h index 16d4d0ec525..d1ff5386823 100644 --- a/src/mesa/drivers/dri/i965/brw_compiler.h +++ b/src/mesa/drivers/dri/i965/brw_compiler.h @@ -344,6 +344,36 @@ struct brw_image_param { uint32_t swizzling[2]; }; +/** + * Max number of binding table entries used for stream output. + * + * From the OpenGL 3.0 spec, table 6.44 (Transform Feedback State), the + * minimum value of MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS is 64. + * + * On Gen6, the size of transform feedback data is limited not by the number + * of components but by the number of binding table entries we set aside. We + * use one binding table entry for a float, one entry for a vector, and one + * entry per matrix column. Since the only way we can communicate our + * transform feedback capabilities to the client is via + * MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS, we need to plan for the + * worst case, in which all the varyings are floats, so we use up one binding + * table entry per component. Therefore we need to set aside at least 64 + * binding table entries for use by transform feedback. + * + * Note: since we don't currently pack varyings, it is currently impossible + * for the client to actually use up all of these binding table entries--if + * all of their varyings were floats, they would run out of varying slots and + * fail to link. But that's a bug, so it seems prudent to go ahead and + * allocate the number of binding table entries we will need once the bug is + * fixed. + */ +#define BRW_MAX_SOL_BINDINGS 64 + +/** + * Binding table index for the first gen6 SOL binding. + */ +#define BRW_GEN6_SOL_BINDING_START 0 + struct brw_stage_prog_data { struct { /** size of our binding table. */ diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index bfe1b392036..20ebebef117 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -378,31 +378,6 @@ struct brw_ff_gs_prog_data { /** Max number of image uniforms in a shader */ #define BRW_MAX_IMAGES 32 -/** - * Max number of binding table entries used for stream output. - * - * From the OpenGL 3.0 spec, table 6.44 (Transform Feedback State), the - * minimum value of MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS is 64. - * - * On Gen6, the size of transform feedback data is limited not by the number - * of components but by the number of binding table entries we set aside. We - * use one binding table entry for a float, one entry for a vector, and one - * entry per matrix column. Since the only way we can communicate our - * transform feedback capabilities to the client is via - * MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS, we need to plan for the - * worst case, in which all the varyings are floats, so we use up one binding - * table entry per component. Therefore we need to set aside at least 64 - * binding table entries for use by transform feedback. - * - * Note: since we don't currently pack varyings, it is currently impossible - * for the client to actually use up all of these binding table entries--if - * all of their varyings were floats, they would run out of varying slots and - * fail to link. But that's a bug, so it seems prudent to go ahead and - * allocate the number of binding table entries we will need once the bug is - * fixed. - */ -#define BRW_MAX_SOL_BINDINGS 64 - /** Maximum number of actual buffers used for stream output */ #define BRW_MAX_SOL_BUFFERS 4 @@ -415,8 +390,6 @@ struct brw_ff_gs_prog_data { 2 + /* shader time, pull constants */ \ 1 /* cs num work groups */) -#define SURF_INDEX_GEN6_SOL_BINDING(t) (t) - /** * Stride in bytes between shader_time entries. * diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c index fea2b93471c..7a3e62a7d2b 100644 --- a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c @@ -454,7 +454,7 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key, final_write ? c->reg.temp : brw_null_reg(), /* dest */ 1, /* msg_reg_nr */ c->reg.header, /* src0 */ - SURF_INDEX_GEN6_SOL_BINDING(binding), /* binding_table_index */ + BRW_GEN6_SOL_BINDING_START + binding, /* binding_table_index */ final_write); /* send_commit_msg */ } } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp index f68baabf473..b2ebdb39b98 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp @@ -510,7 +510,7 @@ generate_gs_svb_write(struct brw_codegen *p, final_write ? src1 : brw_null_reg(), /* dest == src1 */ 1, /* msg_reg_nr */ dst, /* src0 == previous dst */ - SURF_INDEX_GEN6_SOL_BINDING(binding), /* binding_table_index */ + BRW_GEN6_SOL_BINDING_START + binding, /* binding_table_index */ final_write); /* send_commit_msg */ /* Finally, wait for the write commit to occur so that we can proceed to diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c index 702cb2830f0..132f0696e35 100644 --- a/src/mesa/drivers/dri/i965/gen6_sol.c +++ b/src/mesa/drivers/dri/i965/gen6_sol.c @@ -49,7 +49,7 @@ gen6_update_sol_surfaces(struct brw_context *brw) } for (int i = 0; i < BRW_MAX_SOL_BINDINGS; ++i) { - const int surf_index = SURF_INDEX_GEN6_SOL_BINDING(i); + const int surf_index = BRW_GEN6_SOL_BINDING_START + i; if (xfb_active && i < linked_xfb_info->NumOutputs) { unsigned buffer = linked_xfb_info->Outputs[i].OutputBuffer; unsigned buffer_offset =