From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 28 Mar 2019 15:49:49 +0000 (+0000)
Subject: solve sync/comb for stage/state
X-Git-Tag: ls180-24jan2020~1419
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f87d8c78424476b6a70ef7db342857d85489cef9;p=ieee754fpu.git

solve sync/comb for stage/state
---

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index f6606761..16163e07 100644
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -688,13 +688,13 @@ class FPAddAlignSingleAdd(FPState, UnbufferedPipeline):
         chain = StageChain([mod, a0mod, a1mod])
         chain.setup(m, i)
 
-        # XXX TODO: sync for state-based
-        m.d.comb += self.a1o.eq(a1mod.o)
+        self.o = a1mod.o
 
     def process(self, i):
-        return self.a1o
+        return self.o
 
     def action(self, m):
+        m.d.sync += self.a1o.eq(self.process(None))
         m.next = "normalise_1"