From: Richard Earnshaw <rearnsha@arm.com>
Date: Fri, 18 Oct 2019 19:05:25 +0000 (+0000)
Subject: [arm] Fix testsuite nit when compiling for thumb2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f8b9b1edef77be79b3f98021f9d1f24a1e986ffd;p=gcc.git

[arm] Fix testsuite nit when compiling for thumb2

In thumb2 we now generate a NEGS instruction rather than RSBS, so this
test needs updating.

	* gcc.target/arm/negdi-3.c: Update expected output to allow NEGS.

From-SVN: r277192
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4267ac48382..58757027b9c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
+
+	* gcc.target/arm/negdi-3.c: Update expected output to allow NEGS.
+
 2019-10-18  Richard Earnshaw  <rearnsha@arm.com>
 
 	* gcc.dg/builtin-arith-overflow-3.c: New test.
diff --git a/gcc/testsuite/gcc.target/arm/negdi-3.c b/gcc/testsuite/gcc.target/arm/negdi-3.c
index 76ddf49fc0d..1520e9c65df 100644
--- a/gcc/testsuite/gcc.target/arm/negdi-3.c
+++ b/gcc/testsuite/gcc.target/arm/negdi-3.c
@@ -8,10 +8,10 @@ signed long long negdi_zero_extendsidi (unsigned int x)
 }
 /*
 Expected output:
-        rsbs    r0, r0, #0
+        rsbs    r0, r0, #0 (arm) | negs	r0, r0 (thumb2)
         sbc     r1, r1, r1
 */
-/* { dg-final { scan-assembler-times "rsb" 1 } } */
+/* { dg-final { scan-assembler-times "rsbs|negs" 1 } } */
 /* { dg-final { scan-assembler-times "sbc" 1 } } */
 /* { dg-final { scan-assembler-times "mov" 0 } } */
 /* { dg-final { scan-assembler-times "rsc" 0 } } */