From: Benjamin Herrenschmidt Date: Fri, 22 May 2020 07:37:37 +0000 (+1000) Subject: liblitedram/sdram: Add option to disable cdelay() X-Git-Tag: 24jan2021_ls180~271 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f8bb500a4396f29aecad5fb4b0a2a1758c25c514;p=litex.git liblitedram/sdram: Add option to disable cdelay() When running in sim, those delays can take a *long* time, which isn't always necessary with the simulated litedram PHY. This allows system.h to optionally set CONFIG_SIM_DISABLE_DELAYS which causes cdelay to do nothing. This is especially useful when using a verilated litedram inside a bigger/slower simulated design as to not spend a huge amount of time going through the initializations. Signed-off-by: Benjamin Herrenschmidt --- diff --git a/litex/soc/software/liblitedram/sdram.c b/litex/soc/software/liblitedram/sdram.c index 44cab02f..55ea65f1 100644 --- a/litex/soc/software/liblitedram/sdram.c +++ b/litex/soc/software/liblitedram/sdram.c @@ -29,10 +29,12 @@ __attribute__((unused)) static void cdelay(int i) { +#ifndef CONFIG_SIM_DISABLE_DELAYS while(i > 0) { __asm__ volatile(CONFIG_CPU_NOP); i--; } +#endif } #ifdef CSR_SDRAM_BASE