From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 1 Oct 2019 02:54:04 +0000 (-0700)
Subject: Update resource count for alu.ys
X-Git-Tag: working-ls180~989^2~10
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f8d5e11aa7285fc92832b87063d530afe27eca28;p=yosys.git

Update resource count for alu.ys
---

diff --git a/tests/ecp5/alu.ys b/tests/ecp5/alu.ys
index d10cd63b2..c2950b164 100644
--- a/tests/ecp5/alu.ys
+++ b/tests/ecp5/alu.ys
@@ -6,8 +6,8 @@ equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check
 design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
 cd top # Constrain all select calls below inside the top module
 select -assert-count 32 t:CCU2C
-select -assert-count 253 t:L6MUX21
-select -assert-count 1150 t:LUT4
-select -assert-count 423 t:PFUMX
+select -assert-count 242 t:L6MUX21
+select -assert-count 1127 t:LUT4
+select -assert-count 417 t:PFUMX
 select -assert-count 32 t:TRELLIS_FF
 select -assert-none t:CCU2C t:L6MUX21 t:LUT4 t:PFUMX t:TRELLIS_FF %% t:* %D