From: Marek Olšák <marek.olsak@amd.com>
Date: Thu, 26 Jan 2017 02:02:23 +0000 (+0100)
Subject: radeonsi: fold info->indirect conditionals into the last one in draw_vbo
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f8dd2f5bacd75fcbdf5270843438fb57bf202c31;p=mesa.git

radeonsi: fold info->indirect conditionals into the last one in draw_vbo

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
---

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index fb5954eb6c5..aa79b8fcb58 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1102,20 +1102,21 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
 		r600_resource(ib.buffer)->TC_L2_dirty = false;
 	}
 
-	if (info->indirect && r600_resource(info->indirect)->TC_L2_dirty) {
-		sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
-		r600_resource(info->indirect)->TC_L2_dirty = false;
-	}
+	if (info->indirect) {
+		/* Add the buffer size for memory checking in need_cs_space. */
+		r600_context_add_resource_size(ctx, info->indirect);
 
-	if (info->indirect_params &&
-	    r600_resource(info->indirect_params)->TC_L2_dirty) {
-		sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
-		r600_resource(info->indirect_params)->TC_L2_dirty = false;
-	}
+		if (r600_resource(info->indirect)->TC_L2_dirty) {
+			sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
+			r600_resource(info->indirect)->TC_L2_dirty = false;
+		}
 
-	/* Add buffer sizes for memory checking in need_cs_space. */
-	if (info->indirect)
-		r600_context_add_resource_size(ctx, info->indirect);
+		if (info->indirect_params &&
+		    r600_resource(info->indirect_params)->TC_L2_dirty) {
+			sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
+			r600_resource(info->indirect_params)->TC_L2_dirty = false;
+		}
+	}
 
 	si_need_cs_space(sctx);