From: Tamar Christina Date: Mon, 16 Oct 2017 09:54:26 +0000 (+0000) Subject: arm-builtins.c (arm_unsigned_uternop_qualifiers): New. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f8e109ba7bf7ff0b9bb1e7111303ded2c7011a1a;p=gcc.git arm-builtins.c (arm_unsigned_uternop_qualifiers): New. 2017-10-16 Tamar Christina * config/arm/arm-builtins.c (arm_unsigned_uternop_qualifiers): New. (UTERNOP_QUALIFIERS, arm_umac_lane_qualifiers, UMAC_LANE_QUALIFIERS): New. * config/arm/arm_neon_builtins.def (sdot, udot, sdot_lane, udot_lane): new. * config/arm/iterators.md (DOTPROD, VSI2QI, vsi2qi): New. (UNSPEC_DOT_S, UNSPEC_DOT_U, opsuffix): New. * config/arm/neon.md (neon_dot): New. (neon_dot_lane, dot_prod): New. * config/arm/types.md (neon_dot, neon_dot_q): New. * config/arm/unspecs.md (sup): Add UNSPEC_DOT_S, UNSPEC_DOT_U. From-SVN: r253781 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f8ad1dc7c7c..499277552bb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2017-10-16 Tamar Christina + + * config/arm/arm-builtins.c (arm_unsigned_uternop_qualifiers): New. + (UTERNOP_QUALIFIERS, arm_umac_lane_qualifiers, UMAC_LANE_QUALIFIERS): New. + * config/arm/arm_neon_builtins.def (sdot, udot, sdot_lane, udot_lane): new. + * config/arm/iterators.md (DOTPROD, VSI2QI, vsi2qi): New. + (UNSPEC_DOT_S, UNSPEC_DOT_U, opsuffix): New. + * config/arm/neon.md (neon_dot): New. + (neon_dot_lane, dot_prod): New. + * config/arm/types.md (neon_dot, neon_dot_q): New. + * config/arm/unspecs.md (sup): Add UNSPEC_DOT_S, UNSPEC_DOT_U. + 2017-10-16 Tamar Christina * config/arm/arm.h (TARGET_DOTPROD): New. diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index 569f960fd2e..6d1b20c80f9 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -105,6 +105,13 @@ arm_ternop_qualifiers[SIMD_MAX_BUILTIN_ARGS] = { qualifier_none, qualifier_none, qualifier_none, qualifier_none }; #define TERNOP_QUALIFIERS (arm_ternop_qualifiers) +/* unsigned T (unsigned T, unsigned T, unsigned T). */ +static enum arm_type_qualifiers +arm_unsigned_uternop_qualifiers[SIMD_MAX_BUILTIN_ARGS] + = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned, + qualifier_unsigned }; +#define UTERNOP_QUALIFIERS (arm_unsigned_uternop_qualifiers) + /* T (T, immediate). */ static enum arm_type_qualifiers arm_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS] @@ -131,6 +138,13 @@ arm_mac_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS] qualifier_none, qualifier_lane_index }; #define MAC_LANE_QUALIFIERS (arm_mac_lane_qualifiers) +/* unsigned T (unsigned T, unsigned T, unsigend T, lane index). */ +static enum arm_type_qualifiers +arm_umac_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS] + = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned, + qualifier_unsigned, qualifier_lane_index }; +#define UMAC_LANE_QUALIFIERS (arm_umac_lane_qualifiers) + /* T (T, T, immediate). */ static enum arm_type_qualifiers arm_ternop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS] diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def index 07f0368343a..982eec810da 100644 --- a/gcc/config/arm/arm_neon_builtins.def +++ b/gcc/config/arm/arm_neon_builtins.def @@ -331,3 +331,7 @@ VAR11 (STORE1, vst4, v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf) VAR9 (STORE1LANE, vst4_lane, v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf) +VAR2 (TERNOP, sdot, v8qi, v16qi) +VAR2 (UTERNOP, udot, v8qi, v16qi) +VAR2 (MAC_LANE, sdot_lane, v8qi, v16qi) +VAR2 (UMAC_LANE, udot_lane, v8qi, v16qi) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 7acbaf1bb40..a4fb234a846 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -410,6 +410,8 @@ (define_int_iterator VFM_LANE_AS [UNSPEC_VFMA_LANE UNSPEC_VFMS_LANE]) +(define_int_iterator DOTPROD [UNSPEC_DOT_S UNSPEC_DOT_U]) + ;;---------------------------------------------------------------------------- ;; Mode attributes ;;---------------------------------------------------------------------------- @@ -720,6 +722,9 @@ (define_mode_attr pf [(V8QI "p") (V16QI "p") (V2SF "f") (V4SF "f")]) +(define_mode_attr VSI2QI [(V2SI "V8QI") (V4SI "V16QI")]) +(define_mode_attr vsi2qi [(V2SI "v8qi") (V4SI "v16qi")]) + ;;---------------------------------------------------------------------------- ;; Code attributes ;;---------------------------------------------------------------------------- @@ -816,6 +821,7 @@ (UNSPEC_VSRA_S_N "s") (UNSPEC_VSRA_U_N "u") (UNSPEC_VRSRA_S_N "s") (UNSPEC_VRSRA_U_N "u") (UNSPEC_VCVTH_S "s") (UNSPEC_VCVTH_U "u") + (UNSPEC_DOT_S "s") (UNSPEC_DOT_U "u") ]) (define_int_attr vcvth_op @@ -1003,3 +1009,6 @@ (define_int_attr mrrc [(VUNSPEC_MRRC "mrrc") (VUNSPEC_MRRC2 "mrrc2")]) (define_int_attr MRRC [(VUNSPEC_MRRC "MRRC") (VUNSPEC_MRRC2 "MRRC2")]) + +(define_int_attr opsuffix [(UNSPEC_DOT_S "s8") + (UNSPEC_DOT_U "u8")]) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 12ba2d98a0a..e715a5c2ae1 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -3044,6 +3044,76 @@ DONE; }) +;; These instructions map to the __builtins for the Dot Product operations. +(define_insn "neon_dot" + [(set (match_operand:VCVTI 0 "register_operand" "=w") + (plus:VCVTI (match_operand:VCVTI 1 "register_operand" "0") + (unspec:VCVTI [(match_operand: 2 + "register_operand" "w") + (match_operand: 3 + "register_operand" "w")] + DOTPROD)))] + "TARGET_DOTPROD" + "vdot.\\t%0, %2, %3" + [(set_attr "type" "neon_dot")] +) + +;; These instructions map to the __builtins for the Dot Product +;; indexed operations. +(define_insn "neon_dot_lane" + [(set (match_operand:VCVTI 0 "register_operand" "=w") + (plus:VCVTI (match_operand:VCVTI 1 "register_operand" "0") + (unspec:VCVTI [(match_operand: 2 + "register_operand" "w") + (match_operand:V8QI 3 "register_operand" "t") + (match_operand:SI 4 "immediate_operand" "i")] + DOTPROD)))] + "TARGET_DOTPROD" + { + operands[4] + = GEN_INT (NEON_ENDIAN_LANE_N (V8QImode, INTVAL (operands[4]))); + return "vdot.\\t%0, %2, %P3[%c4]"; + } + [(set_attr "type" "neon_dot")] +) + +;; These expands map to the Dot Product optab the vectorizer checks for. +;; The auto-vectorizer expects a dot product builtin that also does an +;; accumulation into the provided register. +;; Given the following pattern +;; +;; for (i=0; idot_prod" + [(set (match_operand:VCVTI 0 "register_operand") + (plus:VCVTI (unspec:VCVTI [(match_operand: 1 + "register_operand") + (match_operand: 2 + "register_operand")] + DOTPROD) + (match_operand:VCVTI 3 "register_operand")))] + "TARGET_DOTPROD" +{ + emit_insn ( + gen_neon_dot (operands[3], operands[3], operands[1], + operands[2])); + emit_insn (gen_rtx_SET (operands[0], operands[3])); + DONE; +}) + (define_expand "neon_copysignf" [(match_operand:VCVTF 0 "register_operand") (match_operand:VCVTF 1 "register_operand") diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md index 22d993d46a3..03e9cdebb75 100644 --- a/gcc/config/arm/types.md +++ b/gcc/config/arm/types.md @@ -316,6 +316,8 @@ ; neon_cls_q ; neon_cnt ; neon_cnt_q +; neon_dot +; neon_dot_q ; neon_ext ; neon_ext_q ; neon_rbit @@ -764,6 +766,8 @@ \ neon_abs,\ neon_abs_q,\ + neon_dot,\ + neon_dot_q,\ neon_neg,\ neon_neg_q,\ neon_qneg,\ @@ -1110,8 +1114,8 @@ neon_sub, neon_sub_q, neon_sub_widen, neon_sub_long, neon_qsub,\ neon_qsub_q, neon_sub_halve, neon_sub_halve_q,\ neon_sub_halve_narrow_q,\ - neon_abs, neon_abs_q, neon_neg, neon_neg_q, neon_qneg,\ - neon_qneg_q, neon_qabs, neon_qabs_q, neon_abd, neon_abd_q,\ + neon_abs, neon_abs_q, neon_dot, neon_dot_q, neon_neg, neon_neg_q,\ + neon_qneg, neon_qneg_q, neon_qabs, neon_qabs_q, neon_abd, neon_abd_q,\ neon_abd_long, neon_minmax, neon_minmax_q, neon_compare,\ neon_compare_q, neon_compare_zero, neon_compare_zero_q,\ neon_arith_acc, neon_arith_acc_q, neon_reduc_add,\ diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md index 99cfa41b08d..c474f4bb5db 100644 --- a/gcc/config/arm/unspecs.md +++ b/gcc/config/arm/unspecs.md @@ -410,4 +410,6 @@ UNSPEC_VRNDN UNSPEC_VRNDP UNSPEC_VRNDX + UNSPEC_DOT_S + UNSPEC_DOT_U ])