From: lkcl <lkcl@web>
Date: Wed, 25 May 2022 11:49:22 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2096
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f8e8c0392d704ef74cd2b880643f8396656207a6;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index ab036f173..60773e5d4 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -74,9 +74,10 @@ In all existing Power ISA Scalar conversion instructions, all
 operands are FPRs, even if the format of the source or destination
 data is actually a scalar integer.
 
-*(This is based on an assumption
+*(The existing Scalar instructions being FP-FP only is based on an assumption
 that VSX will be implemented, and VSX is not part of the SFFS Compliancy
-Level. An earlier version of the Power ISA used to have similar instructions:
+Level. An earlier version of the Power ISA used to have similar
+FPR<->GPR instructions to these:
 they were deprecated due to this incorrect assumption that VSX would
 always be present).*