From: bugzilla-daemon <bugzilla-daemon@libre-riscv.org>
Date: Sun, 22 Mar 2020 23:19:38 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 264] New: ISA switch needs to be a privileged operation
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f9450f8f76f41ec92801f9802408021c1cedb5b2;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 264] New: ISA switch needs to be a privileged operation
---

diff --git a/af/68e54a4a77d166768aa6c1b3925e989e3bc4cb b/af/68e54a4a77d166768aa6c1b3925e989e3bc4cb
new file mode 100644
index 0000000..9dff94d
--- /dev/null
+++ b/af/68e54a4a77d166768aa6c1b3925e989e3bc4cb
@@ -0,0 +1,93 @@
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+Date: Sun, 22 Mar 2020 23:19:38 +0000
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+X-Bugzilla-Component: Specification
+X-Bugzilla-Version: unspecified
+X-Bugzilla-Keywords: 
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
+X-Bugzilla-Status: CONFIRMED
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+X-Bugzilla-Priority: ---
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+X-Bugzilla-Changed-Fields: bug_id short_desc product version rep_platform
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+Message-ID: <bug-264-13@http.bugs.libre-riscv.org/>
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+Subject: [libre-riscv-dev] [Bug 264] New: ISA switch needs to be a
+ privileged operation
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+
+aHR0cDovL2J1Z3MubGlicmUtcmlzY3Yub3JnL3Nob3dfYnVnLmNnaT9pZD0yNjQKCiAgICAgICAg
+ICAgIEJ1ZyBJRDogMjY0CiAgICAgICAgICAgU3VtbWFyeTogSVNBIHN3aXRjaCBuZWVkcyB0byBi
+ZSBhIHByaXZpbGVnZWQgb3BlcmF0aW9uCiAgICAgICAgICAgUHJvZHVjdDogTGlicmUtU09DJ3Mg
+Zmlyc3QgU29DCiAgICAgICAgICAgVmVyc2lvbjogdW5zcGVjaWZpZWQKICAgICAgICAgIEhhcmR3
+YXJlOiBPdGhlcgogICAgICAgICAgICAgICAgT1M6IExpbnV4CiAgICAgICAgICAgIFN0YXR1czog
+Q09ORklSTUVECiAgICAgICAgICBTZXZlcml0eTogZW5oYW5jZW1lbnQKICAgICAgICAgIFByaW9y
+aXR5OiAtLS0KICAgICAgICAgQ29tcG9uZW50OiBTcGVjaWZpY2F0aW9uCiAgICAgICAgICBBc3Np
+Z25lZTogbGtjbEBsa2NsLm5ldAogICAgICAgICAgUmVwb3J0ZXI6IGxrY2xAbGtjbC5uZXQKICAg
+ICAgICAgICAgICAgIENDOiBsaWJyZS1yaXNjdi1kZXZAbGlzdHMubGlicmUtcmlzY3Yub3JnCiAg
+IE5MbmV0IG1pbGVzdG9uZTogLS0tCgp3ZSd2ZSBoYWQgYSByZXF1ZXN0IGZyb20gdGhlIE9wZW5Q
+T1dFUiBmb3VuZGF0aW9uIHRoYXQgSVNBIHN3aXRjaGluZyBiZSBhCnByaXZpbGVnZWQgb3BlcmF0
+aW9uLgoKdGhpcyB0byBwcmV2ZW50IGVuZHVzZXJzIGZyb20gbWl4IGFuZCBtYXRjaGluZyBhcmJp
+dHJhcnkgYXNzZW1ibGVyIGZyb20KbXVsdGlwbGUgY29tcGlsZXJzIGFuZCB0aGVuIGV4cGVjdGlu
+ZyAidmFuaWxsYSIgc3lzdGVtcyB0byBzdXBwb3J0IHRoZQpyZXN1bHRhbnQgZXhjcnVjaWF0aW5n
+bHkgbmF1c2VvdXMgYmluYXJpZXMuCgphIHByaXZpbGVnZWQgb3BlcmF0aW9uIHdpbGwgYWxsb3cg
+c2F5IGEgdGhyZWFkIHRvIGJlIGVzdGFibGlzaGVkIGJ5IHRoZSBrZXJuZWwKd2l0aCB0aGUgc2Ft
+ZSBtZW1vcnkgc3BhY2UgYXMgdGhlIHVzZXJzcGFjZSBhcHBsaWNhdGlvbiBidXQgd2l0aCBhIGRp
+ZmZlcmVudApleGVjdXRhYmxlICh0aGUgM0Qgc2hhZGVyIGNvbXBpbGVkIGFwcGxpY2F0aW9uKQoK
+aW4gcGFydGljdWxhciB3ZSBoYXZlIGEgYml0IG9mIGEgcHJvYmxlbSB3aGVuIGl0IGNvbWVzIHRv
+IGlubGluaW5nIFBPV0VSCmFzc2VtYmxlciB3aXRoIFNWUHJlZml4OiBQT1dFUiBvcGNvZGVzIGNh
+biBiZSBlaXRoZXIgTEUgb3IgQkUsIGFuZAp1bmZvcnR1bmF0ZWx5IGl0IGlzIHRoZSBUT1AgNiBi
+aXRzIHdoaWNoIHNwZWNpZnkgdGhlIG9wY29kZS4KCmlmIHRoZXkgYXJlIExFLCBpdCBpcyBub3Qg
+b2ssIGV4YWN0bHksIHRvIHJlYWQgMzIgYml0cyBhbmQgaGF2ZSB0aGUgZGVjb2Rlcgp0aGVuIHdv
+cmsgb3V0IGlmIHRoZSBvcGNvZGUgaXMgYWN0dWFsbHkgYSAxNiBiaXQgQ29tcHJlc3NlZCBpbnN0
+cnVjdGlvbi4KCnRoYXQganVzdCBkb2Vzbid0IHdvcmsuICBpdCdzICJvayIgZm9yIDQ4IGFuZCA2
+NCBiaXQgU1ZQcmVmaXggKGp1c3QgYSBiaXQKd2VpcmQpIGhvd2V2ZXIgZm9yIEMgaXQgbW9zdCBk
+ZWZpbml0ZWx5IGlzIG5vdC4KCmhvd2V2ZXIgZm9yIEJFIGl0IGp1c3Qgc28gaGFwcGVucyB0aGF0
+IHRob3NlIHRvcCA2IGJpdHMgb2YgYSAzMiBiaXQgb3Bjb2RlIHdpbGwKYmUgYnl0ZSByZXZlcnNl
+ZCBhbmQgc28gd2lsbCBiZSBpbiB0aGUgdmVyeSBmaXJzdCBieXRlIG9mIGFuIGluc3RydWN0aW9u
+CnN0cmVhbS4KCnRoaXMga2luZCBvZiBtZXNzIGlzIGFsc28gd2h5IGl0IHNob3VsZCBiZSBhIHBy
+aXZpbGVnZWQgb3AgdG8gZG8gdGhlIElTQQpzd2l0Y2gsIHJlYWxseS4KCm5lZWRzIHRoaW5raW5n
+IHRocm91Z2gsIHByb3Blcmx5LgoKLS0gCllvdSBhcmUgcmVjZWl2aW5nIHRoaXMgbWFpbCBiZWNh
+dXNlOgpZb3UgYXJlIG9uIHRoZSBDQyBsaXN0IGZvciB0aGUgYnVnLgpfX19fX19fX19fX19fX19f
+X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaWJyZS1yaXNjdi1kZXYgbWFpbGluZyBs
+aXN0CmxpYnJlLXJpc2N2LWRldkBsaXN0cy5saWJyZS1yaXNjdi5vcmcKaHR0cDovL2xpc3RzLmxp
+YnJlLXJpc2N2Lm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpYnJlLXJpc2N2LWRldgo=
+