From: Kenneth Graunke <kenneth@whitecape.org>
Date: Thu, 27 Jun 2019 00:35:45 +0000 (-0700)
Subject: iris: Properly align interface descriptor data addresses
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f94ebf0c9db8dcd2257fd7eb20d457caad3bdeef;p=mesa.git

iris: Properly align interface descriptor data addresses

MEDIA_INTERFACE_DESCRIPTOR's Interface Descriptor Data Start Address
field's docs say: "This bit specifies the 64-byte aligned address..."

And we were doing 32.  Superfluous thread ID uploading was apparently
saving us from GPU hangs in most cases.
---

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index bf31f31f3e4..80c574845b0 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -5567,7 +5567,7 @@ iris_upload_compute_state(struct iris_context *ice,
             GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t);
          load.InterfaceDescriptorDataStartAddress =
             emit_state(batch, ice->state.dynamic_uploader,
-                       &desc_res, desc, sizeof(desc), 32);
+                       &desc_res, desc, sizeof(desc), 64);
       }
 
       pipe_resource_reference(&desc_res, NULL);