From: Gabe Black <gabeblack@google.com>
Date: Tue, 29 Oct 2019 23:23:45 +0000 (-0700)
Subject: mips: Replace gtoh and htog with letoh and htole.
X-Git-Tag: v19.0.0.0~319
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f9517042ae24c10f8953918a26824e3abf991b15;p=gem5.git

mips: Replace gtoh and htog with letoh and htole.

We already know what endianness to use from within MIPS.

Change-Id: Ic4cd295a7a66c4c8ef55ebcf976fe6637567391f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22369
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/arch/mips/linux/process.cc b/src/arch/mips/linux/process.cc
index 1d2709aa1..adfbfd3f6 100644
--- a/src/arch/mips/linux/process.cc
+++ b/src/arch/mips/linux/process.cc
@@ -146,7 +146,7 @@ sys_setsysinfoFunc(SyscallDesc *desc, int callnum, ThreadContext *tc)
             // I don't think this exactly matches the HW FPCR
             fpcr.copyIn(tc->getVirtProxy());
             DPRINTFR(SyscallVerbose, "sys_setsysinfo(SSI_IEEE_FP_CONTROL): "
-                   " setting FPCR to 0x%x\n", gtoh(*(uint64_t*)fpcr));
+                   " setting FPCR to 0x%x\n", letoh(*(uint64_t*)fpcr));
             return 0;
         }
       default:
diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc
index f5aae732c..ca4f79afd 100644
--- a/src/arch/mips/process.cc
+++ b/src/arch/mips/process.cc
@@ -161,7 +161,7 @@ MipsProcess::argsInit(int pageSize)
     // write contents to stack
     IntType argc = argv.size();
 
-    argc = htog((IntType)argc);
+    argc = htole((IntType)argc);
 
     initVirtMem.writeBlob(memState->getStackMin(), &argc, intSize);