From: Steve Reinhardt <stever@eecs.umich.edu>
Date: Mon, 20 Oct 2003 00:30:26 +0000 (-0700)
Subject: Get rid of obsolete code, most of it '#if 0'ed anyway.
X-Git-Tag: m5_1.0_beta2~387
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f951b00d89c716906069160ab21a6d4b6f7e4d6f;p=gem5.git

Get rid of obsolete code, most of it '#if 0'ed anyway.
Mostly vestiges of Dave's long-gone instruction prefetching stuff.

arch/alpha/isa_traits.hh:
    Delete unused extractInstructionPrefetchTarget().
base/inifile.cc:
    Delete '#if 0' code
cpu/base_cpu.hh:
    Delete unused filterThisInstructionPrefetch() function.
cpu/exetrace.hh:
    Delete '#if 0' code (obsolete flags).

--HG--
extra : convert_revision : c8317f56ba0a0e568daa785825ee938584987bed
---

diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh
index 6b78722ad..5e2dac9f3 100644
--- a/arch/alpha/isa_traits.hh
+++ b/arch/alpha/isa_traits.hh
@@ -168,13 +168,6 @@ class AlphaISA
         ITOUCH_ANNOTE = 0xffffffff,
     };
 
-#if 0
-    static inline Addr
-    extractInstructionPrefetchTarget(const MachInst &IR, Addr PC) {
-        return(0);
-    }
-#endif
-
     static inline bool isCallerSaveIntegerRegister(unsigned int reg) {
         panic("register classification not implemented");
         return (reg >= 1 && reg <= 8 || reg >= 22 && reg <= 25 || reg == 27);
diff --git a/base/inifile.cc b/base/inifile.cc
index 92d88c09b..d5436fba8 100644
--- a/base/inifile.cc
+++ b/base/inifile.cc
@@ -400,16 +400,9 @@ IniFile::printUnreferenced()
             }
         }
         else {
-#if 0
-            if (section->findEntry("unref_entries_ok") == NULL) {
-                bool unrefEntries = section->printUnreferenced(sectionName);
-                unref = unref || unrefEntries;
-            }
-#else
             if (section->printUnreferenced(sectionName)) {
                 unref = true;
             }
-#endif
         }
     }
 
diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh
index 5946ced2f..e5d9df6de 100644
--- a/cpu/base_cpu.hh
+++ b/cpu/base_cpu.hh
@@ -120,9 +120,6 @@ class BaseCPU : public SimObject
     System *system;
 #endif
 
-    virtual bool filterThisInstructionPrefetch(int thread_number,
-        short asid, Addr prefetchTarget) const { return true; }
-
     /**
      * Return pointer to CPU's branch predictor (NULL if none).
      * @return Branch predictor pointer.
diff --git a/cpu/exetrace.hh b/cpu/exetrace.hh
index 8e2ea6221..d05dbe0cd 100644
--- a/cpu/exetrace.hh
+++ b/cpu/exetrace.hh
@@ -43,19 +43,6 @@ class BaseCPU;
 
 namespace Trace {
 
-#if 0
-    static const FlagVec ALL =			ULL(0x1);
-    static const FlagVec FULL =			ULL(0x2);
-    static const FlagVec SYMBOLS = 		ULL(0x4);
-    static const FlagVec EXTENDED =		ULL(0x8);
-    static const FlagVec BRANCH_TAKEN = 	ULL(0x10);
-    static const FlagVec BRANCH_NOTTAKEN = 	ULL(0x20);
-    static const FlagVec CALLPAL =		ULL(0x40);
-    static const FlagVec SPECULATIVE =		ULL(0x100);
-    static const FlagVec OMIT_COUNT =		ULL(0x200);
-    static const FlagVec INCLUDE_THREAD_NUM =	ULL(0x400);
-#endif
-
 class InstRecord : public Record
 {
   protected: