From: Gabe Black <gabeblack@google.com>
Date: Sun, 28 Apr 2019 03:37:44 +0000 (-0700)
Subject: alpha: Implement HWREI in the ISA.
X-Git-Tag: v19.0.0.0~915
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f9b72476fd948cde713f145834fba81574b0fde0;p=gem5.git

alpha: Implement HWREI in the ISA.

This moves it out of generic interfaces and the CPU implementations.

Change-Id: I6767d6b26d0ae128b5bdad5830dce838be74e256
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18431
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 8789fa905..5635d381a 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -930,7 +930,24 @@ decode OPCODE default Unknown::unknown() {
   0x1e: decode PALMODE {
       0: OpcdecFault::hw_rei();
         format BasicOperate {
-          1: hw_rei({{ xc->hwrei(); }}, IsSerializing, IsSerializeBefore);
+          1: hw_rei({{
+                Addr pc = PC;
+                if (!(pc & 0x3))
+                    return std::make_shared<UnimplementedOpcodeFault>();
+
+                LockFlag = false;
+                NPC = IprExcAddr;
+
+                ThreadContext *tc = xc->tcBase();
+                auto *base_stats = tc->getKernelStats();
+                auto *stats = dynamic_cast<AlphaISA::Kernel::Statistics *>(
+                        base_stats);
+                assert(stats || !base_stats);
+                if (stats)
+                    stats->hwrei();
+
+                CPA::cpa()->swAutoBegin(tc, IprExcAddr);
+          }}, IsSerializing, IsSerializeBefore);
         }
     }