From: Marek Olšák Date: Tue, 12 Dec 2017 23:40:19 +0000 (+0100) Subject: radeonsi: don't use fast color clear for small images even on APUs X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f9cd6c502e1eea27f4a7904dfd75a6a0a23cb41b;p=mesa.git radeonsi: don't use fast color clear for small images even on APUs Increase the limit and handle non-square images better. This makes glxgears 20% faster on APUs, and a little more on dGPUs. We all use and love glxgears. Tested-by: Dieter Nützel Reviewed-by: Samuel Pitoiset --- diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c index 0ac83f446bf..464b9d7ac56 100644 --- a/src/gallium/drivers/radeonsi/si_clear.c +++ b/src/gallium/drivers/radeonsi/si_clear.c @@ -425,12 +425,11 @@ static void si_do_fast_color_clear(struct si_context *sctx, * the eliminate pass can be higher than the benefit of fast * clear. The closed driver does this, but the numbers may differ. * - * Always use fast clear on APUs. + * This helps on both dGPUs and APUs, even small APUs like Mullins. */ - bool too_small = sctx->screen->info.has_dedicated_vram && - tex->resource.b.b.nr_samples <= 1 && - tex->resource.b.b.width0 <= 256 && - tex->resource.b.b.height0 <= 256; + bool too_small = tex->resource.b.b.nr_samples <= 1 && + tex->resource.b.b.width0 * + tex->resource.b.b.height0 <= 512 * 512; /* Try to clear DCC first, otherwise try CMASK. */ if (vi_dcc_enabled(tex, 0)) {