From: lkcl <lkcl@web>
Date: Mon, 12 Sep 2022 12:55:56 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~469
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fa181af0d437b01028e364cb6dbd2a8b9f3154cd;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index 7bd0d0e82..de5b2ea10 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -116,6 +116,11 @@ number of instructions to get Floating Point constants into registers.
 but if followed up by `fishmv` an additional 16 bits of accuracy in the
 mantissa may be achieved.
 
+These instructions **always** save
+resources compared to FP-load for exactly the same reason
+that `li` saves resources: an L1-Data-Cache and memory read
+is avoided.
+
 *IBM may consider it worthwhile to extend these two instructions to
 v3.1 Prefixed (`pfmvis` and `pfishmv`: 8RR, imm0 extended).
 If so it is recommended that
@@ -130,6 +135,8 @@ Just as Floating-point Load does not set FP Flags neither does fmvis or fishmv.
 As fishmv is specifically intended to work in conjunction with fmvis
 to provide additional accuracy, all bits other than those which
 would have been set by a prior fmvis instruction are deliberately ignored.
+(If these instructions involved reading from registers rather than immediates
+it would be a different story).
 
 ## Load BF16 Immediate