From: colepoirier <colepoirier@gmail.com>
Date: Sat, 10 Apr 2021 04:16:13 +0000 (-0700)
Subject: update rotation of ulx32 jtag wires image
X-Git-Tag: DRAFT_SVP64_0_1~1077^2~11
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fa430b3a7c6a80d54aa5d040bd3dd4add9fcf5d0;p=libreriscv.git

update rotation of ulx32 jtag wires image
---

diff --git a/HDL_workflow/ulx3s_fpga_jtag_wires.jpg b/HDL_workflow/ulx3s_fpga_jtag_wires.jpg
index 0a677fc29..7db186b2a 100644
Binary files a/HDL_workflow/ulx3s_fpga_jtag_wires.jpg and b/HDL_workflow/ulx3s_fpga_jtag_wires.jpg differ