From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 21 Dec 2023 17:22:52 +0000 (+0000)
Subject: whitespace
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fa603a1e9f2259d86acf4e9451937a000d099289;p=openpower-isa.git

whitespace
---

diff --git a/src/openpower/decoder/isa/test_caller_svp64_bc.py b/src/openpower/decoder/isa/test_caller_svp64_bc.py
index 93689ded..36e4bd0b 100644
--- a/src/openpower/decoder/isa/test_caller_svp64_bc.py
+++ b/src/openpower/decoder/isa/test_caller_svp64_bc.py
@@ -204,12 +204,11 @@ class DecoderTestCase(FHDLTestCase):
         occurs with CTR being reduced *at least* by VL.
         """
         for i in [1, 2, 3]:
-            lst = SVP64Asm(
-                [
-                    "sv.bc/ctr/all 16, *0, 0xc",  # branch, test CTR, reducing by VL
-                    "addi 3, 0, 0x1234",   # if tests fail this shouldn't execute
-                    "or 0, 0, 0"]          # branch target
-            )
+            lst = SVP64Asm([
+                "sv.bc/ctr/all 16, *0, 0xc", # branch, test CTR, reducing by VL
+                "addi 3, 0, 0x1234",         # if tests fail shouldn't execute
+                "or 0, 0, 0"                 # branch target
+            ])
             lst = list(lst)
 
             # SVSTATE (in this case, VL=2)