From: Jordi Vaquero Date: Tue, 6 Aug 2019 01:45:06 +0000 (+0200) Subject: cpu-o3: fix atomic instructions non-speculative X-Git-Tag: v19.0.0.0~683 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fb9038ed23dd36b2aaa855932a4aabb015f423e9;p=gem5.git cpu-o3: fix atomic instructions non-speculative Fix problem with O3 and AMO instructions. At initial stages amo instruction is considered a type of non-speculative store. After the instruction has been commited and during the squash step, acquire_release version of the AMO operation is considered speculative, that differents results in an assert fault. This fix ensures that AMO instructions are always considered non-speculative, during early stages and during squas/removal of the instruction. Change-Id: Ia0c5fbb9dc44a9991337b57eb759b1ed08e4149e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19815 Maintainer: Jason Lowe-Power Reviewed-by: Jason Lowe-Power Tested-by: kokoro --- diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index c3e3fdf32..f3362f216 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -1262,7 +1262,6 @@ InstructionQueue::doSquash(ThreadID tid) bool is_acq_rel = squashed_inst->isMemBarrier() && (squashed_inst->isLoad() || - squashed_inst->isAtomic() || (squashed_inst->isStore() && !squashed_inst->isStoreConditional()));