From: Andrew Burgess Date: Sat, 5 Feb 2022 11:25:14 +0000 (+0000) Subject: opcodes/i386: partially implement disassembler style support X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fbbb45cef5f740d0e273b0f5fe4d19a093c2bf8f;p=binutils-gdb.git opcodes/i386: partially implement disassembler style support This commit adds partial support for disassembler styling in the i386 disassembler. The i386 disassembler collects the instruction arguments into an array of strings, and then loops over the array printing the arguments out later on. The problem is that by the time we print the arguments out it's not obvious what the type of each argument is. Obviously this can be fixed, but I'd like to not do that as part of this commit, rather, I'd prefer to keep this commit as small as possible to get the basic infrastructure in place, then we can improve on this, to add additional styling, in later commits. For now then, I think this commit should correctly style mnemonics, some immediates, and comments. Everything else will be printed as plain text, which will include most instruction arguments, unless the argument is printed as a symbol, by calling the print_address_func callback. Ignoring colours, there should be no other user visible changes in the output of the disassembler in either objdump or gdb. opcodes/ChangeLog: * disassembler.c (disassemble_init_for_target): Set created_styled_output for i386 based targets. * i386-dis.c: Changed throughout to use fprintf_styled_func instead of fprintf_func. --- diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 894c97acc2e..bd1b90b3956 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -630,7 +630,12 @@ disassemble_init_for_target (struct disassemble_info * info) info->disassembler_needs_relocs = true; break; #endif - +#ifdef ARCH_i386 + case bfd_arch_i386: + case bfd_arch_iamcu: + info->created_styled_output = true; + break; +#endif #ifdef ARCH_ia64 case bfd_arch_ia64: info->skip_zeroes = 16; diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index db13eea18b9..101eeea150c 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -9402,8 +9402,8 @@ print_insn (bfd_vma pc, instr_info *ins) if (ins->address_mode == mode_64bit && sizeof (bfd_vma) < 8) { - (*ins->info->fprintf_func) (ins->info->stream, - _("64-bit address is disabled")); + (*ins->info->fprintf_styled_func) (ins->info->stream, dis_style_text, + _("64-bit address is disabled")); return -1; } @@ -9452,12 +9452,16 @@ print_insn (bfd_vma pc, instr_info *ins) { name = prefix_name (ins, priv.the_buffer[0], priv.orig_sizeflag); if (name != NULL) - (*ins->info->fprintf_func) (ins->info->stream, "%s", name); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_mnemonic, "%s", name); else { /* Just print the first byte as a .byte instruction. */ - (*ins->info->fprintf_func) (ins->info->stream, ".byte 0x%x", - (unsigned int) priv.the_buffer[0]); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_assembler_directive, ".byte "); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_immediate, "0x%x", + (unsigned int) priv.the_buffer[0]); } return 1; @@ -9475,10 +9479,10 @@ print_insn (bfd_vma pc, instr_info *ins) for (i = 0; i < (int) ARRAY_SIZE (ins->all_prefixes) && ins->all_prefixes[i]; i++) - (*ins->info->fprintf_func) (ins->info->stream, "%s%s", - i == 0 ? "" : " ", - prefix_name (ins, ins->all_prefixes[i], - sizeflag)); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_mnemonic, "%s%s", + (i == 0 ? "" : " "), prefix_name (ins, ins->all_prefixes[i], + sizeflag)); return i; } @@ -9493,10 +9497,11 @@ print_insn (bfd_vma pc, instr_info *ins) /* Handle ins->prefixes before fwait. */ for (i = 0; i < ins->fwait_prefix && ins->all_prefixes[i]; i++) - (*ins->info->fprintf_func) (ins->info->stream, "%s ", - prefix_name (ins, ins->all_prefixes[i], - sizeflag)); - (*ins->info->fprintf_func) (ins->info->stream, "fwait"); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_mnemonic, "%s ", + prefix_name (ins, ins->all_prefixes[i], sizeflag)); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_mnemonic, "fwait"); return i + 1; } @@ -9645,14 +9650,16 @@ print_insn (bfd_vma pc, instr_info *ins) are all 0s in inverted form. */ if (ins->need_vex && ins->vex.register_specifier != 0) { - (*ins->info->fprintf_func) (ins->info->stream, "(bad)"); + (*ins->info->fprintf_styled_func) (ins->info->stream, dis_style_text, + "(bad)"); return ins->end_codep - priv.the_buffer; } /* If EVEX.z is set, there must be an actual mask register in use. */ if (ins->vex.zeroing && ins->vex.mask_register_specifier == 0) { - (*ins->info->fprintf_func) (ins->info->stream, "(bad)"); + (*ins->info->fprintf_styled_func) (ins->info->stream, dis_style_text, + "(bad)"); return ins->end_codep - priv.the_buffer; } @@ -9663,7 +9670,8 @@ print_insn (bfd_vma pc, instr_info *ins) the encoding invalid. Most other PREFIX_OPCODE rules still apply. */ if (ins->need_vex ? !ins->vex.prefix : !(ins->prefixes & PREFIX_DATA)) { - (*ins->info->fprintf_func) (ins->info->stream, "(bad)"); + (*ins->info->fprintf_styled_func) (ins->info->stream, + dis_style_text, "(bad)"); return ins->end_codep - priv.the_buffer; } ins->used_prefixes |= PREFIX_DATA; @@ -9690,7 +9698,8 @@ print_insn (bfd_vma pc, instr_info *ins) || (ins->vex.evex && dp->prefix_requirement != PREFIX_DATA && !ins->vex.w != !(ins->used_prefixes & PREFIX_DATA))) { - (*ins->info->fprintf_func) (ins->info->stream, "(bad)"); + (*ins->info->fprintf_styled_func) (ins->info->stream, + dis_style_text, "(bad)"); return ins->end_codep - priv.the_buffer; } break; @@ -9740,13 +9749,15 @@ print_insn (bfd_vma pc, instr_info *ins) if (name == NULL) abort (); prefix_length += strlen (name) + 1; - (*ins->info->fprintf_func) (ins->info->stream, "%s ", name); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_mnemonic, "%s ", name); } /* Check maximum code length. */ if ((ins->codep - ins->start_codep) > MAX_CODE_LENGTH) { - (*ins->info->fprintf_func) (ins->info->stream, "(bad)"); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_text, "(bad)"); return MAX_CODE_LENGTH; } @@ -9754,7 +9765,8 @@ print_insn (bfd_vma pc, instr_info *ins) for (i = strlen (ins->obuf) + prefix_length; i < 6; i++) oappend (ins, " "); oappend (ins, " "); - (*ins->info->fprintf_func) (ins->info->stream, "%s", ins->obuf); + (*ins->info->fprintf_styled_func) + (ins->info->stream, dis_style_mnemonic, "%s", ins->obuf); /* The enter and bound instructions are printed with operands in the same order as the intel book; everything else is printed in reverse order. */ @@ -9793,7 +9805,8 @@ print_insn (bfd_vma pc, instr_info *ins) if (*op_txt[i]) { if (needcomma) - (*ins->info->fprintf_func) (ins->info->stream, ","); + (*ins->info->fprintf_styled_func) (ins->info->stream, + dis_style_text, ","); if (ins->op_index[i] != -1 && !ins->op_riprel[i]) { bfd_vma target = (bfd_vma) ins->op_address[ins->op_index[i]]; @@ -9809,14 +9822,18 @@ print_insn (bfd_vma pc, instr_info *ins) (*ins->info->print_address_func) (target, ins->info); } else - (*ins->info->fprintf_func) (ins->info->stream, "%s", op_txt[i]); + (*ins->info->fprintf_styled_func) (ins->info->stream, + dis_style_text, "%s", + op_txt[i]); needcomma = 1; } for (i = 0; i < MAX_OPERANDS; i++) if (ins->op_index[i] != -1 && ins->op_riprel[i]) { - (*ins->info->fprintf_func) (ins->info->stream, " # "); + (*ins->info->fprintf_styled_func) (ins->info->stream, + dis_style_comment_start, + " # "); (*ins->info->print_address_func) ((bfd_vma) (ins->start_pc + (ins->codep - ins->start_codep) + ins->op_address[ins->op_index[i]]), ins->info);