From: Jiong Wang Date: Thu, 10 Sep 2015 10:37:17 +0000 (+0000) Subject: [Patch/expand] Cost instruction sequences when doing left wide shift X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fc4d140a5ce4b45523b9616634cfd5e0912115cc;p=gcc.git [Patch/expand] Cost instruction sequences when doing left wide shift Patch background details: https://gcc.gnu.org/ml/gcc-patches/2015-08/msg01147.html gcc/ PR rtl-optimization/67421 * expr.c (expand_expr_real_2): Cost instrcution sequences when doing left wide shift tranformation. From-SVN: r227629 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 92665934d81..d5254fa95ea 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-09-10 Jiong Wang + + PR rtl-optimization/67421 + * expr.c (expand_expr_real_2): Cost instrcution sequences when doing + left wide shift tranformation. + 2015-09-10 Claudiu Zissulescu * common/config/arc/arc-common.c: Remove references to A5. diff --git a/gcc/expr.c b/gcc/expr.c index ee0c1f93249..cf28f449309 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -8892,7 +8892,6 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, && ! unsignedp && mode == GET_MODE_WIDER_MODE (word_mode) && GET_MODE_SIZE (mode) == 2 * GET_MODE_SIZE (word_mode) - && ! have_insn_for (ASHIFT, mode) && TREE_CONSTANT (treeop1) && TREE_CODE (treeop0) == SSA_NAME) { @@ -8908,6 +8907,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode)) >= GET_MODE_BITSIZE (word_mode))) { + rtx_insn *seq, *seq_old; unsigned int high_off = subreg_highpart_offset (word_mode, mode); rtx low = lowpart_subreg (word_mode, op0, mode); @@ -8918,6 +8918,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, - TREE_INT_CST_LOW (treeop1)); tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount); + start_sequence (); /* dest_high = src_low >> (word_size - C). */ temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low, rshift, dest_high, unsignedp); @@ -8930,7 +8931,28 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, if (temp != dest_low) emit_move_insn (dest_low, temp); + seq = get_insns (); + end_sequence (); temp = target ; + + if (have_insn_for (ASHIFT, mode)) + { + bool speed_p = optimize_insn_for_speed_p (); + start_sequence (); + rtx ret_old = expand_variable_shift (code, mode, op0, + treeop1, target, + unsignedp); + + seq_old = get_insns (); + end_sequence (); + if (seq_cost (seq, speed_p) + >= seq_cost (seq_old, speed_p)) + { + seq = seq_old; + temp = ret_old; + } + } + emit_insn (seq); } } }