From: jiawei Date: Mon, 15 Nov 2021 03:03:43 +0000 (+0800) Subject: RISC-V: Scalar crypto instruction and entropy source CSR testcases. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fc5c1c28b3cf059f6c13372d9cf152f115ca745e;p=binutils-gdb.git RISC-V: Scalar crypto instruction and entropy source CSR testcases. Add testcases for Scalar Crypto extension, with total testcase contain all instructions in k-ext/k-ext-64 and sub-extension testcase for zbk* zk*. Also add testcase for new CSR name 'seed' which is the Entropy Source in zkr. In fact these whole testcases can be combined into one file, after we have supported the .option arch +-= directives. gas/ * testsuite/gas/riscv/k-ext-64.d: New testcase for crypto instructions. * testsuite/gas/riscv/k-ext-64.s: Likewise. * testsuite/gas/riscv/k-ext.d: Likewise. * testsuite/gas/riscv/k-ext.s: Likewise. * testsuite/gas/riscv/zbkb-32.d: Likewise. * testsuite/gas/riscv/zbkb-32.s: Likewise. * testsuite/gas/riscv/zbkb-64.d: Likewise. * testsuite/gas/riscv/zbkb-64.s: Likewise. * testsuite/gas/riscv/zbkc-32.d: Likewise. * testsuite/gas/riscv/zbkc-64.d: Likewise. * testsuite/gas/riscv/zbkc.s: Likewise. * testsuite/gas/riscv/zbkx-32.d: Likewise. * testsuite/gas/riscv/zbkx-64.d: Likewise. * testsuite/gas/riscv/zbkx.s: Likewise. * testsuite/gas/riscv/zknd-32.d: Likewise. * testsuite/gas/riscv/zknd-32.s: Likewise. * testsuite/gas/riscv/zknd-64.d: Likewise. * testsuite/gas/riscv/zknd-64.s: Likewise. * testsuite/gas/riscv/zkne-32.d: Likewise. * testsuite/gas/riscv/zkne-32.s: Likewise. * testsuite/gas/riscv/zkne-64.d: Likewise. * testsuite/gas/riscv/zkne-64.s: Likewise. * testsuite/gas/riscv/zknh-32.d: Likewise. * testsuite/gas/riscv/zknh-32.s: Likewise. * testsuite/gas/riscv/zknh-64.d: Likewise. * testsuite/gas/riscv/zknh-64.s: Likewise. * testsuite/gas/riscv/zksed-32.d: Likewise. * testsuite/gas/riscv/zksed-64.d: Likewise. * testsuite/gas/riscv/zksed.s: Likewise. * testsuite/gas/riscv/zksh-32.d: Likewise. * testsuite/gas/riscv/zksh-64.d: Likewise. * testsuite/gas/riscv/zksh.s: Likewise. * testsuite/gas/riscv/priv-reg-fail-zkr.d: New testcase for zkr csr check. * testsuite/gas/riscv/priv-reg-fail-zkr.l: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Updated march to rv32if_zkr. * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise. * testsuite/gas/riscv/priv-reg-version-1p10.d: Added Crypto seed csr. * testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise. * testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise. * testsuite/gas/riscv/priv-reg.s: Likewise. --- diff --git a/gas/testsuite/gas/riscv/k-ext-64.d b/gas/testsuite/gas/riscv/k-ext-64.d new file mode 100644 index 00000000000..06f47566ac8 --- /dev/null +++ b/gas/testsuite/gas/riscv/k-ext-64.d @@ -0,0 +1,47 @@ +#as: -march=rv64i_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zksed_zksh_zkt +#source: k-ext-64.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+ror[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rol[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rori[ ]+a0,a1,0x2 +[ ]+.*:[ ]+.*[ ]+rorw[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rolw[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+roriw[ ]+a0,a1,0x2 +[ ]+.*:[ ]+.*[ ]+andn[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+orn[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xnor[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+pack[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+packh[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+packw[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+brev8[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+rev8[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+clmul[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+clmulh[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xperm4[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xperm8[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64ds[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64dsm[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64im[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+aes64ks1i[ ]+a0,a1,0x4 +[ ]+.*:[ ]+.*[ ]+aes64ks2[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64es[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64esm[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha256sig0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sig1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sum0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sum1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sig0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sig1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sum0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sum1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sm4ed[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+sm4ks[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+sm3p0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sm3p1[ ]+a0,a0 diff --git a/gas/testsuite/gas/riscv/k-ext-64.s b/gas/testsuite/gas/riscv/k-ext-64.s new file mode 100644 index 00000000000..302b82ea005 --- /dev/null +++ b/gas/testsuite/gas/riscv/k-ext-64.s @@ -0,0 +1,38 @@ +target: + ror a0, a1, a2 + rol a0, a1, a2 + rori a0, a1, 2 + rorw a0, a1, a2 + rolw a0, a1, a2 + roriw a0, a1, 2 + andn a0, a1, a2 + orn a0, a1, a2 + xnor a0, a1, a2 + pack a0, a1, a2 + packh a0, a1, a2 + packw a0, a1, a2 + brev8 a0, a0 + rev8 a0, a0 + clmul a0, a1, a2 + clmulh a0, a1, a2 + xperm4 a0, a1, a2 + xperm8 a0, a1, a2 + aes64ds a0, a1, a2 + aes64dsm a0, a1, a2 + aes64im a0, a0 + aes64ks1i a0, a1, 4 + aes64ks2 a0, a1, a2 + aes64es a0, a1, a2 + aes64esm a0, a1, a2 + sha256sig0 a0, a0 + sha256sig1 a0, a0 + sha256sum0 a0, a0 + sha256sum1 a0, a0 + sha512sig0 a0, a0 + sha512sig1 a0, a0 + sha512sum0 a0, a0 + sha512sum1 a0, a0 + sm4ed a0, a1, a2, 2 + sm4ks a0, a1, a2, 2 + sm3p0 a0, a0 + sm3p1 a0, a0 diff --git a/gas/testsuite/gas/riscv/k-ext.d b/gas/testsuite/gas/riscv/k-ext.d new file mode 100644 index 00000000000..3ba65aadc74 --- /dev/null +++ b/gas/testsuite/gas/riscv/k-ext.d @@ -0,0 +1,44 @@ +#as: -march=rv32i_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zksed_zksh_zkt +#source: k-ext.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+ror[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rol[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rori[ ]+a0,a1,0x2 +[ ]+.*:[ ]+.*[ ]+andn[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+orn[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xnor[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+pack[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+packh[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+brev8[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+rev8[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+zip[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+unzip[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+clmul[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+clmulh[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xperm4[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xperm8[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes32dsi[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+aes32dsmi[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+aes32esi[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+aes32esmi[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+sha256sig0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sig1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sum0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sum1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sig0h[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sig0l[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sig1h[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sig1l[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sum0r[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sum1r[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sm4ed[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+sm4ks[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+sm3p0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sm3p1[ ]+a0,a0 diff --git a/gas/testsuite/gas/riscv/k-ext.s b/gas/testsuite/gas/riscv/k-ext.s new file mode 100644 index 00000000000..8eb27684710 --- /dev/null +++ b/gas/testsuite/gas/riscv/k-ext.s @@ -0,0 +1,35 @@ +target: + ror a0, a1, a2 + rol a0, a1, a2 + rori a0, a1, 2 + andn a0, a1, a2 + orn a0, a1, a2 + xnor a0, a1, a2 + pack a0, a1, a2 + packh a0, a1, a2 + brev8 a0, a0 + rev8 a0, a0 + zip a0, a0 + unzip a0, a0 + clmul a0, a1, a2 + clmulh a0, a1, a2 + xperm4 a0, a1, a2 + xperm8 a0, a1, a2 + aes32dsi a0, a1, a2, 2 + aes32dsmi a0, a1, a2, 2 + aes32esi a0, a1, a2, 2 + aes32esmi a0, a1, a2, 2 + sha256sig0 a0, a0 + sha256sig1 a0, a0 + sha256sum0 a0, a0 + sha256sum1 a0, a0 + sha512sig0h a0, a1, a2 + sha512sig0l a0, a1, a2 + sha512sig1h a0, a1, a2 + sha512sig1l a0, a1, a2 + sha512sum0r a0, a1, a2 + sha512sum1r a0, a1, a2 + sm4ed a0, a1, a2, 2 + sm4ks a0, a1, a2, 2 + sm3p0 a0, a0 + sm3p1 a0, a0 diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d index 07cf05a9c29..68acc09122f 100644 --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d @@ -1,4 +1,4 @@ -#as: -march=rv32if -mcsr-check -mpriv-spec=1.10 -march-attr +#as: -march=rv32if_zkr -mcsr-check -mpriv-spec=1.10 -march-attr #source: priv-reg.s #warning_output: priv-reg-fail-version-1p10.l #readelf: -A diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d index bf4b1db3ed6..3aa611c3a2b 100644 --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d @@ -1,4 +1,4 @@ -#as: -march=rv32if -mcsr-check -mpriv-spec=1.11 -march-attr +#as: -march=rv32if_zkr -mcsr-check -mpriv-spec=1.11 -march-attr #source: priv-reg.s #warning_output: priv-reg-fail-version-1p11.l #readelf: -A diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d index e2c33d81dc8..e08381aee82 100644 --- a/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d +++ b/gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d @@ -1,4 +1,4 @@ -#as: -march=rv32if -mcsr-check -mpriv-spec=1.9.1 -march-attr +#as: -march=rv32if_zkr -mcsr-check -mpriv-spec=1.9.1 -march-attr #source: priv-reg.s #warning_output: priv-reg-fail-version-1p9p1.l #readelf: -A diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-zkr.d b/gas/testsuite/gas/riscv/priv-reg-fail-zkr.d new file mode 100644 index 00000000000..d65d5104099 --- /dev/null +++ b/gas/testsuite/gas/riscv/priv-reg-fail-zkr.d @@ -0,0 +1,3 @@ +#as: -march=rv32if -mcsr-check +#source: priv-reg.s +#warning_output: priv-reg-fail-zkr.l diff --git a/gas/testsuite/gas/riscv/priv-reg-fail-zkr.l b/gas/testsuite/gas/riscv/priv-reg-fail-zkr.l new file mode 100644 index 00000000000..107e597aa00 --- /dev/null +++ b/gas/testsuite/gas/riscv/priv-reg-fail-zkr.l @@ -0,0 +1,4 @@ +.*Assembler messages: +#... +.*Warning: invalid CSR `seed' for the current ISA +#... diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p10.d b/gas/testsuite/gas/riscv/priv-reg-version-1p10.d index 3ad8eebe851..78c683d3dea 100644 --- a/gas/testsuite/gas/riscv/priv-reg-version-1p10.d +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p10.d @@ -265,3 +265,4 @@ Disassembly of section .text: [ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1 [ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3 [ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3 +[ ]+[0-9a-f]+:[ ]+01502573[ ]+csrr[ ]+a0,seed diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p11.d b/gas/testsuite/gas/riscv/priv-reg-version-1p11.d index 5824bc5e1f6..6c1cc70479b 100644 --- a/gas/testsuite/gas/riscv/priv-reg-version-1p11.d +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p11.d @@ -265,3 +265,4 @@ Disassembly of section .text: [ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1 [ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3 [ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3 +[ ]+[0-9a-f]+:[ ]+01502573[ ]+csrr[ ]+a0,seed diff --git a/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d b/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d index 569b9587e29..3d2ab74eb35 100644 --- a/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d +++ b/gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d @@ -265,3 +265,4 @@ Disassembly of section .text: [ ]+[0-9a-f]+:[ ]+7a102573[ ]+csrr[ ]+a0,tdata1 [ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3 [ ]+[0-9a-f]+:[ ]+7a302573[ ]+csrr[ ]+a0,tdata3 +[ ]+[0-9a-f]+:[ ]+01502573[ ]+csrr[ ]+a0,seed diff --git a/gas/testsuite/gas/riscv/priv-reg.s b/gas/testsuite/gas/riscv/priv-reg.s index c40d28862b7..85ff2a6f466 100644 --- a/gas/testsuite/gas/riscv/priv-reg.s +++ b/gas/testsuite/gas/riscv/priv-reg.s @@ -282,3 +282,6 @@ csr etrigger # 0x7a1, alias to tdata1 csr textra32 # 0x7a3, alias to tdata3 csr textra64 # 0x7a3, alias to tdata3 + + # Scalar crypto + csr seed # 0x015, Entropy Source diff --git a/gas/testsuite/gas/riscv/zbkb-32.d b/gas/testsuite/gas/riscv/zbkb-32.d new file mode 100644 index 00000000000..75a9259c5d1 --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkb-32.d @@ -0,0 +1,22 @@ +#as: -march=rv32i_zbkb +#source: zbkb-32.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+ror[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rol[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rori[ ]+a0,a1,0x2 +[ ]+.*:[ ]+.*[ ]+andn[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+orn[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xnor[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+pack[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+packh[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+brev8[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+rev8[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+zip[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+unzip[ ]+a0,a0 diff --git a/gas/testsuite/gas/riscv/zbkb-32.s b/gas/testsuite/gas/riscv/zbkb-32.s new file mode 100644 index 00000000000..6f917154517 --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkb-32.s @@ -0,0 +1,13 @@ +target: + ror a0, a1, a2 + rol a0, a1, a2 + rori a0, a1, 2 + andn a0, a1, a2 + orn a0, a1, a2 + xnor a0, a1, a2 + pack a0, a1, a2 + packh a0, a1, a2 + brev8 a0, a0 + rev8 a0, a0 + zip a0, a0 + unzip a0, a0 diff --git a/gas/testsuite/gas/riscv/zbkb-64.d b/gas/testsuite/gas/riscv/zbkb-64.d new file mode 100644 index 00000000000..2f51db19f06 --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkb-64.d @@ -0,0 +1,24 @@ +#as: -march=rv64i_zbkb +#source: zbkb-64.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+ror[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rol[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rori[ ]+a0,a1,0x2 +[ ]+.*:[ ]+.*[ ]+rorw[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+rolw[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+roriw[ ]+a0,a1,0x2 +[ ]+.*:[ ]+.*[ ]+andn[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+orn[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xnor[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+pack[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+packh[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+packw[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+brev8[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+rev8[ ]+a0,a0 diff --git a/gas/testsuite/gas/riscv/zbkb-64.s b/gas/testsuite/gas/riscv/zbkb-64.s new file mode 100644 index 00000000000..b5cf79f890e --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkb-64.s @@ -0,0 +1,15 @@ +target: + ror a0, a1, a2 + rol a0, a1, a2 + rori a0, a1, 2 + rorw a0, a1, a2 + rolw a0, a1, a2 + roriw a0, a1, 2 + andn a0, a1, a2 + orn a0, a1, a2 + xnor a0, a1, a2 + pack a0, a1, a2 + packh a0, a1, a2 + packw a0, a1, a2 + brev8 a0, a0 + rev8 a0, a0 diff --git a/gas/testsuite/gas/riscv/zbkc-32.d b/gas/testsuite/gas/riscv/zbkc-32.d new file mode 100644 index 00000000000..7052f4be451 --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkc-32.d @@ -0,0 +1,12 @@ +#as: -march=rv32i_zbkc +#source: zbkc.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+clmul[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+clmulh[ ]+a0,a1,a2 diff --git a/gas/testsuite/gas/riscv/zbkc-64.d b/gas/testsuite/gas/riscv/zbkc-64.d new file mode 100644 index 00000000000..1620ea9c8db --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkc-64.d @@ -0,0 +1,12 @@ +#as: -march=rv64i_zbkc +#source: zbkc.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+clmul[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+clmulh[ ]+a0,a1,a2 diff --git a/gas/testsuite/gas/riscv/zbkc.s b/gas/testsuite/gas/riscv/zbkc.s new file mode 100644 index 00000000000..2a987746e7b --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkc.s @@ -0,0 +1,3 @@ +target: + clmul a0, a1, a2 + clmulh a0, a1, a2 diff --git a/gas/testsuite/gas/riscv/zbkx-32.d b/gas/testsuite/gas/riscv/zbkx-32.d new file mode 100644 index 00000000000..3306ab42e32 --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkx-32.d @@ -0,0 +1,12 @@ +#as: -march=rv32i_zbkx +#source: zbkx.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+xperm4[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xperm8[ ]+a0,a1,a2 diff --git a/gas/testsuite/gas/riscv/zbkx-64.d b/gas/testsuite/gas/riscv/zbkx-64.d new file mode 100644 index 00000000000..95cca8e9049 --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkx-64.d @@ -0,0 +1,12 @@ +#as: -march=rv64i_zbkx +#source: zbkx.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+xperm4[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+xperm8[ ]+a0,a1,a2 diff --git a/gas/testsuite/gas/riscv/zbkx.s b/gas/testsuite/gas/riscv/zbkx.s new file mode 100644 index 00000000000..8c3077105fe --- /dev/null +++ b/gas/testsuite/gas/riscv/zbkx.s @@ -0,0 +1,3 @@ +target: + xperm4 a0, a1, a2 + xperm8 a0, a1, a2 diff --git a/gas/testsuite/gas/riscv/zknd-32.d b/gas/testsuite/gas/riscv/zknd-32.d new file mode 100644 index 00000000000..4571261e494 --- /dev/null +++ b/gas/testsuite/gas/riscv/zknd-32.d @@ -0,0 +1,12 @@ +#as: -march=rv32i_zknd +#source: zknd-32.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+aes32dsi[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+aes32dsmi[ ]+a0,a1,a2,0x2 diff --git a/gas/testsuite/gas/riscv/zknd-32.s b/gas/testsuite/gas/riscv/zknd-32.s new file mode 100644 index 00000000000..0d09badd1c6 --- /dev/null +++ b/gas/testsuite/gas/riscv/zknd-32.s @@ -0,0 +1,3 @@ +target: + aes32dsi a0, a1, a2, 2 + aes32dsmi a0, a1, a2, 2 diff --git a/gas/testsuite/gas/riscv/zknd-64.d b/gas/testsuite/gas/riscv/zknd-64.d new file mode 100644 index 00000000000..e12b3ef204b --- /dev/null +++ b/gas/testsuite/gas/riscv/zknd-64.d @@ -0,0 +1,15 @@ +#as: -march=rv64i_zknd +#source: zknd-64.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+aes64ds[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64dsm[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64im[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+aes64ks1i[ ]+a0,a1,0x4 +[ ]+.*:[ ]+.*[ ]+aes64ks2[ ]+a0,a1,a2 diff --git a/gas/testsuite/gas/riscv/zknd-64.s b/gas/testsuite/gas/riscv/zknd-64.s new file mode 100644 index 00000000000..4846e93c16f --- /dev/null +++ b/gas/testsuite/gas/riscv/zknd-64.s @@ -0,0 +1,6 @@ +target: + aes64ds a0, a1, a2 + aes64dsm a0, a1, a2 + aes64im a0, a0 + aes64ks1i a0, a1, 4 + aes64ks2 a0, a1, a2 diff --git a/gas/testsuite/gas/riscv/zkne-32.d b/gas/testsuite/gas/riscv/zkne-32.d new file mode 100644 index 00000000000..2f5735971cc --- /dev/null +++ b/gas/testsuite/gas/riscv/zkne-32.d @@ -0,0 +1,12 @@ +#as: -march=rv32i_zkne +#source: zkne-32.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+aes32esi[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+aes32esmi[ ]+a0,a1,a2,0x2 diff --git a/gas/testsuite/gas/riscv/zkne-32.s b/gas/testsuite/gas/riscv/zkne-32.s new file mode 100644 index 00000000000..f864fc1778b --- /dev/null +++ b/gas/testsuite/gas/riscv/zkne-32.s @@ -0,0 +1,3 @@ +target: + aes32esi a0, a1, a2, 2 + aes32esmi a0, a1, a2, 2 diff --git a/gas/testsuite/gas/riscv/zkne-64.d b/gas/testsuite/gas/riscv/zkne-64.d new file mode 100644 index 00000000000..6f6e9c31116 --- /dev/null +++ b/gas/testsuite/gas/riscv/zkne-64.d @@ -0,0 +1,14 @@ +#as: -march=rv64i_zkne +#source: zkne-64.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+aes64es[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64esm[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+aes64ks1i[ ]+a0,a1,0x4 +[ ]+.*:[ ]+.*[ ]+aes64ks2[ ]+a0,a1,a2 diff --git a/gas/testsuite/gas/riscv/zkne-64.s b/gas/testsuite/gas/riscv/zkne-64.s new file mode 100644 index 00000000000..9b5612001af --- /dev/null +++ b/gas/testsuite/gas/riscv/zkne-64.s @@ -0,0 +1,5 @@ +target: + aes64es a0, a1, a2 + aes64esm a0, a1, a2 + aes64ks1i a0, a1, 4 + aes64ks2 a0, a1, a2 diff --git a/gas/testsuite/gas/riscv/zknh-32.d b/gas/testsuite/gas/riscv/zknh-32.d new file mode 100644 index 00000000000..ac4b2447629 --- /dev/null +++ b/gas/testsuite/gas/riscv/zknh-32.d @@ -0,0 +1,20 @@ +#as: -march=rv32i_zknh +#source: zknh-32.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+sha256sig0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sig1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sum0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sum1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sig0h[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sig0l[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sig1h[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sig1l[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sum0r[ ]+a0,a1,a2 +[ ]+.*:[ ]+.*[ ]+sha512sum1r[ ]+a0,a1,a2 diff --git a/gas/testsuite/gas/riscv/zknh-32.s b/gas/testsuite/gas/riscv/zknh-32.s new file mode 100644 index 00000000000..dc2cd3c6657 --- /dev/null +++ b/gas/testsuite/gas/riscv/zknh-32.s @@ -0,0 +1,11 @@ +target: + sha256sig0 a0, a0 + sha256sig1 a0, a0 + sha256sum0 a0, a0 + sha256sum1 a0, a0 + sha512sig0h a0, a1, a2 + sha512sig0l a0, a1, a2 + sha512sig1h a0, a1, a2 + sha512sig1l a0, a1, a2 + sha512sum0r a0, a1, a2 + sha512sum1r a0, a1, a2 diff --git a/gas/testsuite/gas/riscv/zknh-64.d b/gas/testsuite/gas/riscv/zknh-64.d new file mode 100644 index 00000000000..890d5d826f3 --- /dev/null +++ b/gas/testsuite/gas/riscv/zknh-64.d @@ -0,0 +1,18 @@ +#as: -march=rv64i_zknh +#source: zknh-64.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+sha256sig0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sig1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sum0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha256sum1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sig0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sig1[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sum0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sha512sum1[ ]+a0,a0 diff --git a/gas/testsuite/gas/riscv/zknh-64.s b/gas/testsuite/gas/riscv/zknh-64.s new file mode 100644 index 00000000000..897dc0ba32e --- /dev/null +++ b/gas/testsuite/gas/riscv/zknh-64.s @@ -0,0 +1,9 @@ +target: + sha256sig0 a0, a0 + sha256sig1 a0, a0 + sha256sum0 a0, a0 + sha256sum1 a0, a0 + sha512sig0 a0, a0 + sha512sig1 a0, a0 + sha512sum0 a0, a0 + sha512sum1 a0, a0 diff --git a/gas/testsuite/gas/riscv/zksed-32.d b/gas/testsuite/gas/riscv/zksed-32.d new file mode 100644 index 00000000000..228130ae4c1 --- /dev/null +++ b/gas/testsuite/gas/riscv/zksed-32.d @@ -0,0 +1,12 @@ +#as: -march=rv32i_zksed +#source: zksed.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+sm4ed[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+sm4ks[ ]+a0,a1,a2,0x2 diff --git a/gas/testsuite/gas/riscv/zksed-64.d b/gas/testsuite/gas/riscv/zksed-64.d new file mode 100644 index 00000000000..9a4efdff649 --- /dev/null +++ b/gas/testsuite/gas/riscv/zksed-64.d @@ -0,0 +1,12 @@ +#as: -march=rv64i_zksed +#source: zksed.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+sm4ed[ ]+a0,a1,a2,0x2 +[ ]+.*:[ ]+.*[ ]+sm4ks[ ]+a0,a1,a2,0x2 diff --git a/gas/testsuite/gas/riscv/zksed.s b/gas/testsuite/gas/riscv/zksed.s new file mode 100644 index 00000000000..ee95c7a8584 --- /dev/null +++ b/gas/testsuite/gas/riscv/zksed.s @@ -0,0 +1,3 @@ +target: + sm4ed a0, a1, a2, 2 + sm4ks a0, a1, a2, 2 diff --git a/gas/testsuite/gas/riscv/zksh-32.d b/gas/testsuite/gas/riscv/zksh-32.d new file mode 100644 index 00000000000..ab22b3f1f4f --- /dev/null +++ b/gas/testsuite/gas/riscv/zksh-32.d @@ -0,0 +1,12 @@ +#as: -march=rv32i_zksh +#source: zksh.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+sm3p0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sm3p1[ ]+a0,a0 diff --git a/gas/testsuite/gas/riscv/zksh-64.d b/gas/testsuite/gas/riscv/zksh-64.d new file mode 100644 index 00000000000..91a3f16e511 --- /dev/null +++ b/gas/testsuite/gas/riscv/zksh-64.d @@ -0,0 +1,12 @@ +#as: -march=rv64i_zksh +#source: zksh.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+.*:[ ]+.*[ ]+sm3p0[ ]+a0,a0 +[ ]+.*:[ ]+.*[ ]+sm3p1[ ]+a0,a0 diff --git a/gas/testsuite/gas/riscv/zksh.s b/gas/testsuite/gas/riscv/zksh.s new file mode 100644 index 00000000000..b321c26f2b2 --- /dev/null +++ b/gas/testsuite/gas/riscv/zksh.s @@ -0,0 +1,3 @@ +target: + sm3p0 a0, a0 + sm3p1 a0, a0