From: Francisco Jerez Date: Tue, 26 Apr 2016 02:20:12 +0000 (-0700) Subject: i965/eu: Set execution size explicitly for memory fence send message. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fc7107de1d7cac6be817e8951e53f997c248c277;p=mesa.git i965/eu: Set execution size explicitly for memory fence send message. We don't want to emit a 32-wide send message in 32-wide programs. The memory fence message should have the same effect regardless of the execution size (as long as it's valid) so just set it to one. Reviewed-by: Jason Ekstrand --- diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index cbd7e1ace48..9dba818b1b3 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -3261,6 +3261,11 @@ brw_memory_fence(struct brw_codegen *p, const bool commit_enable = devinfo->gen == 7 && !devinfo->is_haswell; struct brw_inst *insn; + brw_push_insn_state(p); + brw_set_default_mask_control(p, BRW_MASK_DISABLE); + brw_set_default_exec_size(p, BRW_EXECUTE_1); + dst = vec1(dst); + /* Set dst as destination for dependency tracking, the MEMORY_FENCE * message doesn't write anything back. */ @@ -3287,12 +3292,10 @@ brw_memory_fence(struct brw_codegen *p, * cache messages will be properly ordered with respect to past data and * render cache messages. */ - brw_push_insn_state(p); - brw_set_default_compression_control(p, BRW_COMPRESSION_NONE); - brw_set_default_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, dst, offset(dst, 1)); - brw_pop_insn_state(p); } + + brw_pop_insn_state(p); } void