From: Jeffrey A Law <law@cygnus.com>
Date: Wed, 28 Jul 1999 22:34:57 +0000 (+0000)
Subject: pa.c (store_reg): Do not call add_high_const generator directly.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fc82f2f1dd34b0df7137f8462a1fe23ae98c2dab;p=gcc.git

pa.c (store_reg): Do not call add_high_const generator directly.

        * pa.c (store_reg): Do not call add_high_const generator directly.
        (load_reg, set_reg_plus_d): Likewise.
        * pa.md (add_high_const): No longer a named pattern.

From-SVN: r28327
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7a125b74a97..cd22387d8f4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
 Wed Jul 28 13:18:35 1999  Jeffrey A Law  (law@cygnus.com)
 
+	* pa.c (store_reg): Do not call add_high_const generator directly.
+	(load_reg, set_reg_plus_d): Likewise.
+	* pa.md (add_high_const): No longer a named pattern.
+
 	* pa.c (legitimize_address): Consistently use Pmode rather than
 	SImode.  Do not call gen_pic2_highpart directly anymore.
 	* pa.md (pic2_highpart): No longer a named pattern.
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 03e178f3886..a5753bfee47 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -2453,7 +2453,7 @@ remove_useless_addtr_insns (insns, check_notes)
 */
 
 /* Emit RTL to store REG at the memory location specified by BASE+DISP.
-   Handle case where DISP > 8k by using the add_high_const pattern.
+   Handle case where DISP > 8k by using the add_high_const patterns.
 
    Note in DISP > 8k case, we will leave the high part of the address
    in %r1.  There is code in expand_hppa_{prologue,epilogue} that knows this.*/
@@ -2471,9 +2471,9 @@ store_reg (reg, disp, base)
     }
   else
     {
-      emit_insn (gen_add_high_const (gen_rtx_REG (Pmode, 1),
-				     gen_rtx_REG (Pmode, base),
-				     GEN_INT (disp)));
+      emit_move_insn (gen_rtx_REG (Pmode, 1),
+		      gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, base),
+				    gen_rtx_HIGH (Pmode, GEN_INT (disp))));
       emit_move_insn (gen_rtx_MEM (word_mode,
 				   gen_rtx_LO_SUM (Pmode,
 						   gen_rtx_REG (Pmode, 1),
@@ -2483,7 +2483,7 @@ store_reg (reg, disp, base)
 }
 
 /* Emit RTL to load REG from the memory location specified by BASE+DISP.
-   Handle case where DISP > 8k by using the add_high_const pattern.
+   Handle case where DISP > 8k by using the add_high_const patterns.
 
    Note in DISP > 8k case, we will leave the high part of the address
    in %r1.  There is code in expand_hppa_{prologue,epilogue} that knows this.*/
@@ -2501,9 +2501,9 @@ load_reg (reg, disp, base)
     }
   else
     {
-      emit_insn (gen_add_high_const (gen_rtx_REG (Pmode, 1),
-				     gen_rtx_REG (Pmode, base),
-				     GEN_INT (disp)));
+      emit_move_insn (gen_rtx_REG (Pmode, 1),
+		      gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, base),
+				    gen_rtx_HIGH (Pmode, GEN_INT (disp))));
       emit_move_insn (gen_rtx_REG (word_mode, reg),
 		      gen_rtx_MEM (word_mode,
 				   gen_rtx_LO_SUM (Pmode,
@@ -2513,7 +2513,7 @@ load_reg (reg, disp, base)
 }
 
 /* Emit RTL to set REG to the value specified by BASE+DISP.
-   Handle case where DISP > 8k by using the add_high_const pattern.
+   Handle case where DISP > 8k by using the add_high_const patterns.
 
    Note in DISP > 8k case, we will leave the high part of the address
    in %r1.  There is code in expand_hppa_{prologue,epilogue} that knows this.*/
@@ -2530,9 +2530,9 @@ set_reg_plus_d(reg, base, disp)
     }
   else
     {
-      emit_insn (gen_add_high_const (gen_rtx_REG (Pmode, 1),
-				     gen_rtx_REG (Pmode, base),
-				     GEN_INT (disp)));
+      emit_move_insn (gen_rtx_REG (Pmode, 1),
+		      gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, base),
+				    gen_rtx_HIGH (Pmode, GEN_INT (disp))));
       emit_move_insn (gen_rtx_REG (Pmode, reg),
 		      gen_rtx_LO_SUM (Pmode,
 				      gen_rtx_REG (Pmode, 1),
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index b441f3df511..b2c4c8cb444 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -1668,7 +1668,7 @@
 ;; Because of the additional %r1 pressure, we probably do not
 ;; want to use this in general code, so make it available
 ;; only after reload.
-(define_insn "add_high_const"
+(define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=!a,*r")
 	(plus:SI (match_operand:SI 1 "register_operand" "r,r")
 		 (high:SI (match_operand 2 "const_int_operand" ""))))]