From: Kenneth Graunke <kenneth@whitecape.org>
Date: Sat, 24 Sep 2011 08:45:18 +0000 (-0700)
Subject: i965: Set "Stencil Buffer Enable" bit on Haswell.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fc8edbe016348a22e4631fb1e1c7f7b87301c5ec;p=mesa.git

i965: Set "Stencil Buffer Enable" bit on Haswell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
---

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index a0931121475..e7326c6ca3f 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1445,6 +1445,7 @@ enum brw_wm_barycentric_interp_mode {
 #define GEN7_3DSTATE_CLEAR_PARAMS		0x7804
 #define GEN7_3DSTATE_DEPTH_BUFFER		0x7805
 #define GEN7_3DSTATE_STENCIL_BUFFER		0x7806
+# define HSW_STENCIL_ENABLED                            (1 << 31)
 #define GEN7_3DSTATE_HIER_DEPTH_BUFFER		0x7807
 
 #define _3DSTATE_CLEAR_PARAMS			0x7910 /* ILK, SNB */
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index d0ce54241b6..5da64349e5a 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -139,9 +139,12 @@ static void emit_depthbuffer(struct brw_context *brw)
       OUT_BATCH(0);
       ADVANCE_BATCH();
    } else {
+      const int enabled = intel->is_haswell ? HSW_STENCIL_ENABLED : 0;
+
       BEGIN_BATCH(3);
       OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
-      OUT_BATCH(stencil_mt->region->pitch * stencil_mt->region->cpp - 1);
+      OUT_BATCH(enabled |
+	        (stencil_mt->region->pitch * stencil_mt->region->cpp - 1));
       OUT_RELOC(stencil_mt->region->bo,
 	        I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 		0);