From: Jason Ekstrand Date: Wed, 6 Feb 2019 20:27:34 +0000 (-0600) Subject: intel/fs: Use enumerated array assignments in fb read TXF setup X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fd77606b5b6365a15f2c7b7fcd97c35a67d4be57;p=mesa.git intel/fs: Use enumerated array assignments in fb read TXF setup It's more clear and means we don't have to update the array every time we add an optional texture instruction argument Reviewed-by: Caio Marcelo de Oliveira Filho --- diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 1041296b903..b7f71338f75 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -2924,11 +2924,15 @@ fs_visitor::emit_non_coherent_fb_read(const fs_builder &bld, const fs_reg &dst, SHADER_OPCODE_TXF_CMS_LOGICAL; /* Emit the instruction. */ - const fs_reg srcs[] = { coords, fs_reg(), brw_imm_ud(0), fs_reg(), - fs_reg(), sample, mcs, - brw_imm_ud(surface), brw_imm_ud(0), - fs_reg(), brw_imm_ud(3), brw_imm_ud(0) }; - STATIC_ASSERT(ARRAY_SIZE(srcs) == TEX_LOGICAL_NUM_SRCS); + fs_reg srcs[TEX_LOGICAL_NUM_SRCS]; + srcs[TEX_LOGICAL_SRC_COORDINATE] = coords; + srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_ud(0); + srcs[TEX_LOGICAL_SRC_SAMPLE_INDEX] = sample; + srcs[TEX_LOGICAL_SRC_MCS] = mcs; + srcs[TEX_LOGICAL_SRC_SURFACE] = brw_imm_ud(surface); + srcs[TEX_LOGICAL_SRC_SAMPLER] = brw_imm_ud(0); + srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_ud(3); + srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_ud(0); fs_inst *inst = bld.emit(op, dst, srcs, ARRAY_SIZE(srcs)); inst->size_written = 4 * inst->dst.component_size(inst->exec_size);