From: Jacob Lifshay Date: Mon, 3 Oct 2022 23:40:36 +0000 (-0700) Subject: work on SVP64 scalar overriding VL to 1 question X-Git-Tag: opf_rfc_ls005_v1~205 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fdfbe2f064e73c1109c2a56e352179fdffb00e86;p=libreriscv.git work on SVP64 scalar overriding VL to 1 question --- diff --git a/openpower/sv/svp64/discussion.mdwn b/openpower/sv/svp64/discussion.mdwn index c97625660..894d8b3ff 100644 --- a/openpower/sv/svp64/discussion.mdwn +++ b/openpower/sv/svp64/discussion.mdwn @@ -210,7 +210,7 @@ therefore it makes no sense to have DEST SUBVL, and instead to have special mv o full review needed, answering question: - if sv.op RT.scalar RA.scalar RB.scalar is set to "VL=1" is anything lost? + if sv.op RT.scalar RA.scalar RB.scalar is changed to temporarily override VL to be 1, is anything lost? four aspects: @@ -223,7 +223,7 @@ four aspects: **Normal Mode:** -* simple mode is straight vectorisation. +* simple mode is straight vectorization. * reduce mode * ffirst or data-dependent fail-on-first: * sat mode or saturation: @@ -243,7 +243,7 @@ predicate-result should be fine as well (aside from change in predicate behaviou [[sv/ldst]] -First critical observation, RA.isvec is utilised to detect element-stride. +First critical observation, RA.isvec is utilized to detect element-stride. ``` if RA.isvec: @@ -256,42 +256,43 @@ elif immediate != 0: thus it is actually legitimate to have scalar src *and* dest especially with predicate masks. the trick noted in (4) below of setting `RA.isvec` -would therefore activate the *Vector Indexed* mode, with associated predication-based offsets (and REMAP) which is **NOT** the same as -`VSPLAT` mode. +would therefore activate the *Vector Indexed* mode, with associated +predication-based offsets (and REMAP) (not to be confused with VSPLAT mode). elif RA.isvec: - # quirky Vector indexed mode but with an immediate - srcbase = ireg[RA+i] - offs = immed; + # quirky Vector indexed mode but with an immediate + srcbase = ireg[RA+i] + offs = immed; else - # standard scalar mode (but predicated) - # no stride multiplier means VSPLAT mode - srcbase = ireg[RA] - offs = immed + # standard scalar mode (but predicated) + # no stride multiplier means VSPLAT mode (FIXME(lkcl): unclear -- + # VSPLAT requires RT.isvec=1 and all sources to be scalar) + srcbase = ireg[RA] + offs = immed -Question: +* Question: is RA.isvec=0 RT.isvec=1 a substitute? -Answer: + Answer: - no because this is VSPLAT mode + no because RA.isvec=0 RT.isvec=1 is VSPLAT mode -Question: +* Question: - are there any other equivalent modes? + are there any other equivalent modes? -Answer: + Answer: no, because immediate=0 selects Indexed mode -Question: +* Question: can the VSPLAT mode be actually used in proposed scalar-mode? -Answer: + Answer: - possibly. + No, scalar-mode requires RA.isvec=0 RT.isvec=0, but VSPLAT is RA.isvec=0 RT.isvec=1. VL>1 at the moment, with a scalar source and scalar dest, will not undergo any changes to the EA compared to if VL=1.