From: Ali Saidi <saidi@eecs.umich.edu>
Date: Thu, 10 Apr 2008 18:44:52 +0000 (-0400)
Subject: PhysicalMemory: Add parameter for variance in memory delay.
X-Git-Tag: copyright_update~5
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fe12f3835354e62aca078789f4b07470f35396a2;p=gem5.git

PhysicalMemory: Add parameter for variance in memory delay.

--HG--
extra : convert_revision : b931472e81dedb650b7accb9061cb426f1c32e66
---

diff --git a/src/mem/PhysicalMemory.py b/src/mem/PhysicalMemory.py
index 99bd27f2b..4e8a830de 100644
--- a/src/mem/PhysicalMemory.py
+++ b/src/mem/PhysicalMemory.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2005-2007 The Regents of The University of Michigan
+# Copyright (c) 2005-2008 The Regents of The University of Michigan
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -36,6 +36,7 @@ class PhysicalMemory(MemObject):
     range = Param.AddrRange(AddrRange('128MB'), "Device Address")
     file = Param.String('', "memory mapped file")
     latency = Param.Latency('1t', "latency of an access")
+    latency_var = Param.Latency('0ns', "access variablity")
     zero = Param.Bool(False, "zero initialize memory")
 
 class DRAMMemory(PhysicalMemory):
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 3560fc670..c06dd3170 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -41,6 +41,7 @@
 
 #include "arch/isa_traits.hh"
 #include "base/misc.hh"
+#include "base/random.hh"
 #include "config/full_system.hh"
 #include "mem/packet_access.hh"
 #include "mem/physical.hh"
@@ -51,7 +52,8 @@ using namespace std;
 using namespace TheISA;
 
 PhysicalMemory::PhysicalMemory(const Params *p)
-    : MemObject(p), pmemAddr(NULL), lat(p->latency)
+    : MemObject(p), pmemAddr(NULL), lat(p->latency),
+      lat_var(p->latency_var)
 {
     if (params()->range.size() % TheISA::PageBytes != 0)
         panic("Memory Size not divisible by page size\n");
@@ -116,7 +118,10 @@ PhysicalMemory::deviceBlockSize()
 Tick
 PhysicalMemory::calculateLatency(PacketPtr pkt)
 {
-    return lat;
+    Tick latency = lat;
+    if (lat_var != 0)
+        latency += random_mt.random<Tick>(0, lat_var);
+    return latency;
 }
 
 
diff --git a/src/mem/physical.hh b/src/mem/physical.hh
index c3749bd5b..ceb36b5c0 100644
--- a/src/mem/physical.hh
+++ b/src/mem/physical.hh
@@ -146,6 +146,7 @@ class PhysicalMemory : public MemObject
     uint8_t *pmemAddr;
     int pagePtr;
     Tick lat;
+    Tick lat_var;
     std::vector<MemoryPort*> ports;
     typedef std::vector<MemoryPort*>::iterator PortIterator;