From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 5 Dec 2018 03:41:58 +0000 (+0000)
Subject: add RVV spec link
X-Git-Tag: convert-csv-opcode-to-binary~4809
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fe53a10ad47a525d24ffb42a98e4a0151e93c62d;p=libreriscv.git

add RVV spec link
---

diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
index 5ac25349c..a35d09b79 100644
--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -94,7 +94,9 @@ single-instruction "memcpy" and "memzero") - the primary driver behind
 Simple-V has been as the basis for turning RISC-V into an
 embedded-style (low-power) GPU (and also a VPU).
 
-one of the things that's lacking from RVV is parallelisation of
+one of the things that's lacking from
+[RVV](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc)
+is parallelisation of
 Bit-Manipulation.  RVV has been primarily designed based on input from
 the Supercomputer community, and as such it's *incredible*.
 absolutely amazing... but only desirable to implementt if you need to