From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 12 Jul 2018 11:50:09 +0000 (+0100)
Subject: add slides
X-Git-Tag: convert-csv-opcode-to-binary~5048
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fe53bc0a0ba8707216613b74d2b7a4d0b2700302;p=libreriscv.git

add slides
---

diff --git a/shakti/m_class/libre_riscv_chennai_2018.tex b/shakti/m_class/libre_riscv_chennai_2018.tex
index 500b38e82..a65a0d869 100644
--- a/shakti/m_class/libre_riscv_chennai_2018.tex
+++ b/shakti/m_class/libre_riscv_chennai_2018.tex
@@ -325,6 +325,26 @@
 }
 
 
+\frame{\frametitle{Interesting Missing Stuff [1] - Pinmux}
+
+ \begin{itemize}
+   \item Pinmux: multiplexer of functions onto pins\\
+	     {\it DRAM Cell != DDR3/4, Mux Cell != Muxer}
+   \item Strategically extremely important to Commercial SoC success\\
+	     STMicro, Rockchip, Freescale, Samsung, {\bf EVERYONE}
+   \item Bizarrely, a libre-licensed multi-way Pinmux doesn't exist.\\
+         {\it not on anyone's radar. at all.}
+         SiFive IOF not enough.
+   \item Verification (scenario analysis) and auto-generation of
+		 TRM, header files, device-tree files, pretty much everything
+		 makes sense (to any "lazy" Software Engineer...)
+   \item Corporations with their own pinmux unlikely to be interested.
+   \item http://git.libre-riscv.org/?p=pinmux.git \\
+         http://hands.com/~lkcl/pinmux\_chennai\_2018.pdf
+  \end{itemize}
+}
+
+
 \frame{\frametitle{TODO}
 
  \begin{itemize}