From: Luke Kenneth Casson Leighton Date: Tue, 23 Aug 2022 11:47:58 +0000 (+0100) Subject: more table entries for simulators X-Git-Tag: opf_rfc_ls005_v1~783 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fe766dd1ec707cf2adee7f4417641c55d85cbfc2;p=libreriscv.git more table entries for simulators --- diff --git a/openpower/simulators.mdwn b/openpower/simulators.mdwn index d0253eb32..7a1ae91cc 100644 --- a/openpower/simulators.mdwn +++ b/openpower/simulators.mdwn @@ -1,7 +1,12 @@ # List of Simulators and features -| Name | Cycle
accurate | Speed | Parallel | Mem
usage | 32-bit | 64-bit | FP | SIMD | Bare
metal | HV | XICS | -|------------------|----------------------|-------|----------|-----------------|--------|--------|------|------|------------------|----|------| -| gem5 | yes | 20k/s?| no | insane | yes | yes | no | no | no | no | no | -| gem5-experimental| yes | 20k/s?| no | insane | yes | yes | no | no | yes | no | yes | -| gem5-virginiatech| yes | 20k/s?| no | insane | yes | yes | no | TODO | no | no | no | +| Name | Cycle
acc. | Speed | SMP | VM | Mem
usage | 32-bit | 64-bit | FP | SIMD | Bare
metal | HV | XICS | +|------------------|------------------|-------|-----|----|-----------------|--------|--------|------|------|------------------|----|------| +| IBM Sim | yes | unk | yes | yes| unknown | yes | yes | yes | yes | yes | yes| yes | +| gem5 | yes | 20k/s?| no | no | insane | yes | yes | no | no | no | no | no | +| gem5-experimental| yes | 20k/s?| no | yes| insane | yes | yes | no | no | yes | no | yes | +| gem5-virginiatech| yes | 20k/s?| no | no | insane | yes | yes | no | TODO | no | no | no | +| qemu | no | 100k? | no | yes| ok | yes | yes | yes | yes | yes | yes| yes | +| dolphinpc | no | unk | no | no | ok | yes | no | no | no | yes | no | no | +| cavatools | yes | 300k/s| yes | no | good | yes | yes | yes | no | no | no | no | +| ISACaller | no | 2500/s| no | yes| ok | yes | yes | yes | no | yes | no | yes |