From: Ian Romanick Date: Thu, 14 May 2020 23:46:32 +0000 (-0700) Subject: intel/drm-shim: Return correct values for I915_PARAM_HAS_ALIASING_PPGTT X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fec36c0668bf8f1fd477c97549a0b50f1c55cf4d;p=mesa.git intel/drm-shim: Return correct values for I915_PARAM_HAS_ALIASING_PPGTT It sure looks like it should be a Boolean value, but it's not. The values that we really want for later platforms are either 2 or 3. The old intel_stub.c in shader-db just always returns 3 (I915_GEM_PPGTT_FULL). This returns the same set of values per platform that kernel 5.6.13 would. When using the shim for ICL with i965 driver, this fixes: i965 requires softpin (Kernel 4.5) on Gen10+. Fixes: 0f4f1d70bfe ("intel: add stub_gpu tool") Reviewed-by: Lionel Landwerlin Part-of: --- diff --git a/src/intel/tools/intel_noop_drm_shim.c b/src/intel/tools/intel_noop_drm_shim.c index 89d1ce50e26..c4a0860f5e5 100644 --- a/src/intel/tools/intel_noop_drm_shim.c +++ b/src/intel/tools/intel_noop_drm_shim.c @@ -135,7 +135,12 @@ i915_ioctl_get_param(int fd, unsigned long request, void *arg) *gp->value = i915.devinfo.timestamp_frequency; return 0; case I915_PARAM_HAS_ALIASING_PPGTT: - *gp->value = i915.devinfo.is_haswell || i915.devinfo.gen >= 8; + if (i915.devinfo.gen < 6) + *gp->value = I915_GEM_PPGTT_NONE; + else if (i915.devinfo.gen <= 7) + *gp->value = I915_GEM_PPGTT_ALIASING; + else + *gp->value = I915_GEM_PPGTT_FULL; return 0; case I915_PARAM_HAS_WAIT_TIMEOUT: case I915_PARAM_HAS_EXECBUF2: