From: lkcl Date: Sun, 26 Mar 2023 21:23:17 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls001_v3~38 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fece9f474fca690970699fa6f7f7b26afce9a8b7;p=libreriscv.git --- diff --git a/openpower/sv/rfc/ls009.mdwn b/openpower/sv/rfc/ls009.mdwn index fa5cc6d57..f81958d54 100644 --- a/openpower/sv/rfc/ls009.mdwn +++ b/openpower/sv/rfc/ls009.mdwn @@ -85,9 +85,6 @@ Add the following entries to: \newpage{} - -[[!tag standards]] - # REMAP REMAP is an advanced form of Vector "Structure Packing" that @@ -579,6 +576,10 @@ explicitly disabled, either by `setvl` setting a new MAXVL, or with another clearing persistence, as well as partially covering a subset of the capability of `svremap` to set register-to-SVSHAPE relationships. +------------- + +\newpage{} + # SHAPE Remapping SPRs There are four "shape" SPRs, SHAPE0-3, 32-bits in each, @@ -785,6 +786,10 @@ becomes possible to perform in-place Transpose of Indices which may have been costly to set up or costly to duplicate (waste register file space). +------------- + +\newpage{} + # svshape instruction Form: SVM-Form SV "Matrix" Form (see [[isatables/fields.text]]) @@ -1034,15 +1039,19 @@ to SVSHAPE0-3 with `mtspr`. Circumstances include Matrices with dimensions larger than 32, and in-place Transpose. Potentially a future v3.1 Prefixed instruction, `psvshape`, may extend the capability here. +------------- + +\newpage{} + + # svindex instruction +SVI-Form | 0.5|6.10 |11.15 |16.20 | 21..25 | 26..31| name | Form | | -- | -- | --- | ---- | ----------- | ------| -------- | ---- | |OPCD| SVG | rmm | SVd | ew/yx/mm/sk | XO | svindex | SVI-Form | -SVI-Form - * svindex SVG,rmm,SVd,ew,SVyx,mm,sk Pseudo-code: @@ -1212,6 +1221,11 @@ whilst `mm=1` is intended to be a little more refined. Beyond these mappings it becomes necessary to write directly to the SVSTATE SPRs manually. +------------- + +\newpage{} + + # svshape2 (offset) `svshape2` is an additional convenience instruction that prioritises @@ -1273,45 +1287,6 @@ is clearly **invalid**.* - - -# svstep: Vertical-First Stepping and status reporting - -SVL-Form - -* svstep RT,SVi,vf (Rc=0) -* svstep. RT,SVi,vf (Rc=1) - -| 0-5|6-10|11.15|16..22| 23-25 | 26-30 |31| Form | -|----|----|-----|------|----------|-------|--|--------- | -|PO | RT | / | SVi | / / vf | XO |Rc| SVL-Form | - -Pseudo-code: - -``` - if SVi[3:4] = 0b11 then - # store pack and unpack in SVSTATE - SVSTATE[53] <- SVi[5] - SVSTATE[54] <- SVi[6] - RT <- [0]*62 || SVSTATE[53:54] - else - # Vertical-First explicit stepping. - step <- SVSTATE_NEXT(SVi, vf) - RT <- [0]*57 || step -``` - -Special Registers Altered: - - CR0 (if Rc=1) - -**Description** - - -------------- - -\newpage{} - - ------------- \newpage{} @@ -1335,7 +1310,6 @@ Add the following to Book I, 1.6.1, SVM-Form Add the following to Book I, 1.6.1, SVM2-Form ``` -# 1.6.35.1 SVM2-FORM |0 |6 |10 |11 |16 |21 |24|25 |26 |31 | | PO | SVo |SVyx| rmm | SVd |XO |mm|sk | XO | ``` @@ -1343,7 +1317,6 @@ Add the following to Book I, 1.6.1, SVM2-Form Add the following to Book I, 1.6.1, SVRM-Form ``` -# 1.6.36 SVRM-FORM |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 | | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO | ```