From: Sebastien Bourdeauducq Date: Thu, 25 Apr 2013 11:30:05 +0000 (+0200) Subject: fhdl/specials/memory: do not write address register for async reads X-Git-Tag: 24jan2021_ls180~2099^2~602 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fee228a09f55bc91a9c5e900b35520e1456a62d6;p=litex.git fhdl/specials/memory: do not write address register for async reads --- diff --git a/migen/fhdl/specials.py b/migen/fhdl/specials.py index 842cb55e..59ef7303 100644 --- a/migen/fhdl/specials.py +++ b/migen/fhdl/specials.py @@ -258,11 +258,11 @@ class Memory(Special): elif port.mode == NO_CHANGE: rd = "\tif (!" + gn(port.we) + ")\n" \ + "\t\t" + bassign - if port.re is None: - r += rd - else: - r += "\tif (" + gn(port.re) + ")\n" - r += "\t" + rd.replace("\n\t", "\n\t\t") + if port.re is None: + r += rd + else: + r += "\tif (" + gn(port.re) + ")\n" + r += "\t" + rd.replace("\n\t", "\n\t\t") r += "end\n\n" for port in memory.ports: