From: Petr Murzin Date: Wed, 18 May 2016 09:06:11 +0000 (+0000) Subject: Fix patterns to enable sse-14.c to compile with -masm=intel. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=fef31922aab50ff497f64f171bfb97f393561c12;p=gcc.git Fix patterns to enable sse-14.c to compile with -masm=intel. gcc/ * config/i386/sse.md (define_insn "srcp14"): Use proper operand modifiers. (define_insn "rsqrt14"): Ditto. (define_insn "avx512dq_cvtps2qqv2di"): Ditto. (define_insn "fix_truncv2sfv2di2"): Ditto. (define_insn "avx512f_v8div16qi2_mask_store"): Ditto. (define_insn "vec_set_hi_"): Ditto. (define_insn "avx512dq_broadcast"): Ditto. (define_insn "*avx512f_gatherdi"): Ditto. (define_insn "*avx512f_scatterdi"): Ditto. * config/i386/i386.c (ix86_print_operand): Expand check for size override codes for Intel syntax. Co-Authored-By: Kirill Yukhin From-SVN: r236362 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ba2ab087242..8aaaa816ebb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +2016-05-18 Petr Murzin + Kirill Yukhin + + * config/i386/sse.md (define_insn "srcp14"): Use proper operand + modifiers. + (define_insn "rsqrt14"): Ditto. + (define_insn "avx512dq_cvtps2qqv2di"): Ditto. + (define_insn "fix_truncv2sfv2di2"): Ditto. + (define_insn "avx512f_v8div16qi2_mask_store"): Ditto. + (define_insn "vec_set_hi_"): Ditto. + (define_insn "avx512dq_broadcast"): + Ditto. + (define_insn "*avx512f_gatherdi"): Ditto. + (define_insn "*avx512f_scatterdi"): Ditto. + * config/i386/i386.c (ix86_print_operand): Expand check for size + override codes for Intel syntax. + 2016-05-18 Richard Biener PR tree-optimization/71168 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index e65f3120b6c..cecea110e41 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -17622,6 +17622,10 @@ ix86_print_operand (FILE *file, rtx x, int code) size = "QWORD"; else if (code == 'x') size = "XMMWORD"; + else if (code == 't') + size = "YMMWORD"; + else if (code == 'g') + size = "ZMMWORD"; else if (mode == BLKmode) /* ... or BLKmode operands, when not overridden. */ size = NULL; diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index d77227a7c27..e0af4916bc8 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1485,7 +1485,7 @@ (match_operand:VF_128 2 "register_operand" "v") (const_int 1)))] "TARGET_AVX512F" - "vrcp14\t{%1, %2, %0|%0, %2, %1}" + "vrcp14\t{%1, %2, %0|%0, %2, %1}" [(set_attr "type" "sse") (set_attr "prefix" "evex") (set_attr "mode" "")]) @@ -1583,7 +1583,7 @@ (match_operand:VF_128 2 "register_operand" "v") (const_int 1)))] "TARGET_AVX512F" - "vrsqrt14\t{%1, %2, %0|%0, %2, %1}" + "vrsqrt14\t{%1, %2, %0|%0, %2, %1}" [(set_attr "type" "sse") (set_attr "prefix" "evex") (set_attr "mode" "")]) @@ -4276,7 +4276,7 @@ (parallel [(const_int 0) (const_int 1)]))] UNSPEC_FIX_NOTRUNC))] "TARGET_AVX512DQ && TARGET_AVX512VL" - "vcvtps2qq\t{%1, %0|%0, %1}" + "vcvtps2qq\t{%1, %0|%0, %q1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") (set_attr "mode" "TI")]) @@ -4299,7 +4299,7 @@ (parallel [(const_int 0) (const_int 1)]))] UNSPEC_UNSIGNED_FIX_NOTRUNC))] "TARGET_AVX512DQ && TARGET_AVX512VL" - "vcvtps2uqq\t{%1, %0|%0, %1}" + "vcvtps2uqq\t{%1, %0|%0, %q1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") (set_attr "mode" "TI")]) @@ -4974,7 +4974,7 @@ (match_operand:V4SF 1 "nonimmediate_operand" "vm") (parallel [(const_int 0) (const_int 1)]))))] "TARGET_AVX512DQ && TARGET_AVX512VL" - "vcvttps2qq\t{%1, %0|%0, %1}" + "vcvttps2qq\t{%1, %0|%0, %q1}" [(set_attr "type" "ssecvt") (set_attr "prefix" "evex") (set_attr "mode" "TI")]) @@ -8944,7 +8944,7 @@ (const_int 12) (const_int 13) (const_int 14) (const_int 15)]))))] "TARGET_AVX512VL" - "vpmovqb\t{%1, %0%{%2%}|%0%{%2%}, %1}" + "vpmovqb\t{%1, %0%{%2%}|%w0%{%2%}, %1}" [(set_attr "type" "ssemov") (set_attr "memory" "store") (set_attr "prefix" "evex") @@ -9034,7 +9034,11 @@ (const_int 12) (const_int 13) (const_int 14) (const_int 15)]))))] "TARGET_AVX512VL" - "vpmov\t{%1, %0%{%2%}|%0%{%2%}, %1}" +{ + if (GET_MODE_SIZE (GET_MODE_INNER (mode)) == 8) + return "vpmov\t{%1, %0%{%2%}|%k0%{%2%}, %1}"; + return "vpmov\t{%1, %0%{%2%}|%0%{%2%}, %g1}"; +} [(set_attr "type" "ssemov") (set_attr "memory" "store") (set_attr "prefix" "evex") @@ -9125,7 +9129,11 @@ (const_int 12) (const_int 13) (const_int 14) (const_int 15)]))))] "TARGET_AVX512VL" - "vpmov\t{%1, %0%{%2%}|%0%{%2%}, %1}" +{ + if (GET_MODE_SIZE (GET_MODE_INNER (mode)) == 4) + return "vpmov\t{%1, %0%{%2%}|%0%{%2%}, %g1}"; + return "vpmov\t{%1, %0%{%2%}|%0%{%2%}, %1}"; +} [(set_attr "type" "ssemov") (set_attr "memory" "store") (set_attr "prefix" "evex") @@ -9219,7 +9227,11 @@ (parallel [(const_int 4) (const_int 5) (const_int 6) (const_int 7)]))))] "TARGET_AVX512VL" - "vpmov\t{%1, %0%{%2%}|%0%{%2%}, %1}" +{ + if (GET_MODE_SIZE (GET_MODE_INNER (mode)) == 4) + return "vpmov\t{%1, %0%{%2%}|%0%{%2%}, %t1}"; + return "vpmov\t{%1, %0%{%2%}|%0%{%2%}, %g1}"; +} [(set_attr "type" "ssemov") (set_attr "memory" "store") (set_attr "prefix" "evex") @@ -9294,7 +9306,7 @@ (const_int 4) (const_int 5) (const_int 6) (const_int 7)]))))] "TARGET_AVX512VL" - "vpmovqw\t{%1, %0%{%2%}|%0%{%2%}, %1}" + "vpmovqw\t{%1, %0%{%2%}|%0%{%2%}, %g1}" [(set_attr "type" "ssemov") (set_attr "memory" "store") (set_attr "prefix" "evex") @@ -9373,7 +9385,7 @@ (match_dup 0) (parallel [(const_int 2) (const_int 3)]))))] "TARGET_AVX512VL" - "vpmovqd\t{%1, %0%{%2%}|%0%{%2%}, %1}" + "vpmovqd\t{%1, %0%{%2%}|%0%{%2%}, %t1}" [(set_attr "type" "ssemov") (set_attr "memory" "store") (set_attr "prefix" "evex") @@ -9476,7 +9488,7 @@ (const_int 12) (const_int 13) (const_int 14) (const_int 15)]))))] "TARGET_AVX512F" - "vpmovqb\t{%1, %0%{%2%}|%0%{%2%}, %1}" + "vpmovqb\t{%1, %0%{%2%}|%q0%{%2%}, %1}" [(set_attr "type" "ssemov") (set_attr "memory" "store") (set_attr "prefix" "evex") @@ -12229,7 +12241,7 @@ (const_int 2) (const_int 3)])) (match_operand: 2 "nonimmediate_operand" "vm")))] "TARGET_AVX512F" - "vinsert64x4\t{$0x1, %2, %1, %0|%0, %1, %2, $0x1}" + "vinsert64x4\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" [(set_attr "type" "sselog") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") @@ -17130,7 +17142,7 @@ (match_operand: 1 "nonimmediate_operand" "vm") (parallel [(const_int 0) (const_int 1)]))))] "TARGET_AVX512DQ" - "vbroadcast32x2\t{%1, %0|%0, %1}" + "vbroadcast32x2\t{%1, %0|%0, %q1}" [(set_attr "type" "ssemov") (set_attr "prefix_extra" "1") (set_attr "prefix" "evex") @@ -18544,7 +18556,11 @@ UNSPEC_GATHER)) (clobber (match_scratch:QI 2 "=&Yk"))] "TARGET_AVX512F" - "vgatherq\t{%6, %1%{%2%}|%1%{%2%}, %g6}" +{ + if (GET_MODE_SIZE (GET_MODE_INNER (mode)) == 4) + return "vgatherq\t{%6, %1%{%2%}|%1%{%2%}, %t6}"; + return "vgatherq\t{%6, %1%{%2%}|%1%{%2%}, %g6}"; +} [(set_attr "type" "ssemov") (set_attr "prefix" "evex") (set_attr "mode" "")]) @@ -18644,7 +18660,11 @@ UNSPEC_SCATTER)) (clobber (match_scratch:QI 1 "=&Yk"))] "TARGET_AVX512F" - "vscatterq\t{%3, %5%{%1%}|%5%{%1%}, %3}" +{ + if (GET_MODE_SIZE (GET_MODE_INNER (mode)) == 8) + return "vscatterq\t{%3, %5%{%1%}|%5%{%1%}, %3}"; + return "vscatterq\t{%3, %5%{%1%}|%t5%{%1%}, %3}"; +} [(set_attr "type" "ssemov") (set_attr "prefix" "evex") (set_attr "mode" "")])