From: Ben Elliston <bje@au.ibm.com>
Date: Fri, 1 Feb 2002 12:04:27 +0000 (+0000)
Subject: 	* sim-sh64.h: New file.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ff750edfb3615b0b5da52ace170113bfb3fcaf80;p=binutils-gdb.git

	* sim-sh64.h: New file.
---

diff --git a/include/ChangeLog b/include/ChangeLog
index d668165b76c..65ed3b5a3e8 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,6 +1,10 @@
+2002-02-01  Ben Elliston  <bje@redhat.com>
+
+	* sim-sh64.h: New file.
+
 2001-10-24  Neil Booth  <neil@daikokuya.demon.co.uk>
 
-	* include/safe-ctype.h (_sch_isbasic, IS_ISOBASIC): New.
+	* safe-ctype.h (_sch_isbasic, IS_ISOBASIC): New.
 
 2002-01-31  Ivan Guzvinec  <ivang@opencores.org>
 
diff --git a/include/sim-sh64.h b/include/sim-sh64.h
new file mode 100644
index 00000000000..95fa4eb8b5a
--- /dev/null
+++ b/include/sim-sh64.h
@@ -0,0 +1,54 @@
+/* This file defines the interface between the sh64 simulator and gdb.
+   Copyright (C) 2000 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#if !defined (SIM_SH64_H)
+#define SIM_SH64_H
+
+#ifdef __cplusplus
+extern "C" { // }
+#endif
+
+/* The simulator makes use of the following register information. */
+
+enum
+  {
+    SIM_SH64_R0_REGNUM = 0,
+    SIM_SH64_SP_REGNUM = 15,
+    SIM_SH64_PC_REGNUM = 64,
+    SIM_SH64_SR_REGNUM = 65,
+    SIM_SH64_SSR_REGNUM = 66,
+    SIM_SH64_SPC_REGNUM = 67,
+    SIM_SH64_TR0_REGNUM = 68,
+    SIM_SH64_FPCSR_REGNUM = 76,
+    SIM_SH64_FR0_REGNUM = 77
+  };
+
+enum
+  {
+    SIM_SH64_NR_REGS = 141,  /* total number of architectural registers */
+    SIM_SH64_NR_R_REGS = 64, /* number of general registers */
+    SIM_SH64_NR_TR_REGS = 8, /* number of target registers */
+    SIM_SH64_NR_FP_REGS = 64 /* number of floating point registers */
+  };
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif