From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 11 Apr 2021 12:01:34 +0000 (+0100)
Subject: add FT232 photo
X-Git-Tag: DRAFT_SVP64_0_1~1077^2~4
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ff76d735775c3f548cb7e711b6b2a505eb9182a2;p=libreriscv.git

add FT232 photo
---

diff --git a/HDL_workflow/ECP5_FPGA.mdwn b/HDL_workflow/ECP5_FPGA.mdwn
index f5b960132..21b493840 100644
--- a/HDL_workflow/ECP5_FPGA.mdwn
+++ b/HDL_workflow/ECP5_FPGA.mdwn
@@ -229,6 +229,10 @@ Image of JTAG jumper wire connections on ft232r side:
 
 [[!img HDL_workflow/ft232r_jtag_wires.jpg size="500x" ]] 
 
+Colour markings on ft232r side:
+
+[[!img HDL_workflow/ft232.png size="500x" ]] 
+
 # VERSA ECP5 Connections
 
 Table of connections: