From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 27 May 2021 17:37:38 +0000 (+0100)
Subject: debug print qemu and simulator LR
X-Git-Tag: xlen-bcd~523
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ff83dd1be113c4c53acf68530d5e32df1017d5ca;p=openpower-isa.git

debug print qemu and simulator LR
---

diff --git a/src/openpower/decoder/isa/pypowersim.py b/src/openpower/decoder/isa/pypowersim.py
index 5a4d3e6d..159c7c56 100644
--- a/src/openpower/decoder/isa/pypowersim.py
+++ b/src/openpower/decoder/isa/pypowersim.py
@@ -93,13 +93,16 @@ def qemu_register_compare(sim, q, regs, fprs):
     sim_cr = sim.cr.value
     sim_pc = sim.pc.CIA.value
     sim_xer = sim.spr['XER'].value
+    sim_lr = sim.spr['LR'].value
     print("qemu pc", hex(qpc))
     print("qemu cr", hex(qcr))
+    print("qemu lr", bin(qlr))
     print("qemu xer", bin(qxer))
     print("sim nia", hex(sim.pc.NIA.value))
     print("sim pc", hex(sim.pc.CIA.value))
     print("sim cr", hex(sim_cr))
     print("sim xer", hex(sim_xer))
+    print("sim lr", hex(sim_lr))
     #self.assertEqual(qpc, sim_pc)
     for reg in regs:
         qemu_val = q.get_gpr(reg)