From: Ron Dreslinski Date: Thu, 1 Dec 2005 23:47:36 +0000 (-0500) Subject: Two small fixes for mem_req's and Probe path with MOSI/MOESI X-Git-Tag: m5_2.0_beta1~265 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ffc32970f63ae1330f080a7ea14a79bc4446bc33;p=gem5.git Two small fixes for mem_req's and Probe path with MOSI/MOESI cpu/simple/cpu.cc: Properly set the Instruction Read bit in the Memory Request --HG-- extra : convert_revision : e1a4756f32718fd8ef3ac3db16625bd6d8f07cc5 --- diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc index d352d8c03..a7f4fa499 100644 --- a/cpu/simple/cpu.cc +++ b/cpu/simple/cpu.cc @@ -382,6 +382,7 @@ SimpleCPU::copy(Addr dest) memReq->dest = dest_addr; memReq->size = 64; memReq->time = curTick; + memReq->flags &= ~INST_READ; dcacheInterface->access(memReq); } } @@ -412,6 +413,7 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags) memReq->cmd = Read; memReq->completionEvent = NULL; memReq->time = curTick; + memReq->flags &= ~INST_READ; MemAccessResult result = dcacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is @@ -500,6 +502,7 @@ SimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) memcpy(memReq->data,(uint8_t *)&data,memReq->size); memReq->completionEvent = NULL; memReq->time = curTick; + memReq->flags &= ~INST_READ; MemAccessResult result = dcacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is @@ -714,6 +717,7 @@ SimpleCPU::tick() memReq->completionEvent = NULL; memReq->time = curTick; + memReq->flags |= INST_READ; MemAccessResult result = icacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is