Forgot to remove dissasembly file.
[microwatt.git] / Makefile
2023-05-02 Andrey Miroshnikovhello_world/Makefile: Add base address define. Add...
2022-04-24 Luke Kenneth Casso... add RESET_ADDRESS parameter into Makefile,
2022-02-27 Luke Kenneth Casso... link unused signals to undefined
2022-02-27 Luke Kenneth Casso... add fpga/top-ulx3s.vhdl which sets dummy values for...
2022-02-27 Luke Kenneth Casso... add external_core_top.v to build for ulx3s
2022-02-27 Luke Kenneth Casso... fix missing uart_top (ordering of read_verilog is now...
2022-02-27 Luke Kenneth Casso... ULX3S is an LFE5U-85F ECP5 not a LFE5UMG-85F
2022-02-11 Luke Kenneth Casso... whoops wrong constraints file
2022-02-11 Luke Kenneth Casso... re-enable hello_world for ulx3s
2022-02-11 Luke Kenneth Casso... drop clock frequency for ulx3s to 25 mhz
2022-02-11 Luke Kenneth Casso... add ULX3S Makefile target
2022-01-21 Luke Kenneth Casso... grr, save/restore in verilator, use class member os...
2022-01-21 Luke Kenneth Casso... add save/restore and memdump function to microwatt...
2022-01-05 Luke Kenneth Casso... add reporting of PC and instruction being executed...
2022-01-05 Luke Kenneth Casso... add extra suppression of verilator warnings
2022-01-03 Luke Kenneth Casso... add means to run an external core from a verilog file.
2022-01-02 Luke Kenneth Casso... move linux kernel (dtbImage-microwatt) loading to 0x600000
2022-01-02 Luke Kenneth Casso... add SIM_BRAM_CHAINBOOT parameter to SYSCON
2022-01-01 Luke Kenneth Casso... gotten over the logic-dyslexia of what in/out mean...
2021-12-30 Luke Kenneth Casso... bring bram signals out to top_level, initially for...
2021-01-18 Paul Mackerrascore: Track CR hazards and bypasses using tags
2021-01-18 Paul Mackerrascore: Track GPR hazards using tags that propagate throu...
2020-12-08 Anton BlanchardMerge pull request #255 from antonblanchard/log-length
2020-12-08 Anton BlanchardMerge pull request #254 from antonblanchard/fix-verilator
2020-12-07 Anton BlanchardAdd verilator FPGA target
2020-12-07 Anton BlanchardMerge pull request #253 from antonblanchard/fix-verilator
2020-12-07 Anton BlanchardFix verilator build
2020-12-01 Michael NeulingMerge pull request #249 from paulusmack/master
2020-12-01 Michael NeulingMerge pull request #250 from umarcor/containers
2020-11-30 umarcormakefile: update synthesis containers
2020-11-30 umarcormakefile: whitespace cleanup
2020-09-17 Michael NeulingMerge pull request #245 from paulusmack/fpu
2020-09-03 Paul Mackerrascore: Add framework for an FPU
2020-08-13 Michael NeulingMerge pull request #235 from paulusmack/master
2020-08-06 Paul MackerrasAdd random number generator and implement the darn...
2020-07-09 Michael NeulingMerge pull request #222 from iamjpn/master
2020-07-08 Paul MackerrasMerge pull request #223 from mikey/ecp5
2020-07-07 Michael NeulingAdd PLL for ECP5 device
2020-07-07 Anton BlanchardMerge pull request #220 from mikey/ghdl-makefile
2020-07-07 Anton BlanchardMerge pull request #209 from mikey/yosys
2020-07-04 Michael NeulingUse $(GHDL) rather than ghdl in Makefile
2020-07-02 Michael NeulingAdd FPGA_TARGET=ECP5-EVN make option for synthesis...
2020-07-02 Michael NeulingAdd SYNTH_ECP5_FLAGS option for building
2020-07-02 Michael NeulingAdd ram file to synthesis build dependencies
2020-07-02 Michael NeulingAdd uart16550 files to yosys/nextpnr build
2020-07-02 Michael NeulingBuild to tmp file so nextpnr errors don't confuse make
2020-07-02 Michael NeulingFix building with yosys/nextpnr
2020-06-30 Paul MackerrasMerge pull request #206 from Jbalkind/icachecleanup
2020-06-29 Michael NeulingMerge pull request #213 from ozbenh/uart16550
2020-06-23 Benjamin Herrenschmidtuart: Add a simulation model for the 16550 compatible...
2020-06-23 Benjamin Herrenschmidtuart: Rename sim_uart.vhdl to sim_pp_uart.vhdl
2020-06-19 Michael NeulingMerge pull request #208 from paulusmack/faster
2020-06-13 Paul Mackerrascore: Remove fetch2 pipeline stage
2020-06-13 Paul MackerrasMerge pull request #204 from ozbenh/spi
2020-06-13 Benjamin Herrenschmidtspi: Add simulation support
2020-06-09 Michael NeulingMerge pull request #196 from ozbenh/makefile-lib-fix
2020-06-09 Benjamin HerrenschmidtMakefile: Improve unisim library generation
2020-06-05 Michael NeulingMerge pull request #193 from paulusmack/master
2020-06-05 Paul MackerrasMerge pull request #182 from mikey/travis
2020-06-05 Michael NeulingAdd unit tests to check and check_light
2020-06-05 Michael NeulingAdd unit tests make target
2020-06-05 Michael NeulingAdd tests_console make target
2020-06-05 Paul MackerrasMerge pull request #191 from ozbenh/litedram
2020-06-05 Benjamin Herrenschmidtlitedram: Remove old "VexRiscV" based initializations
2020-06-05 Benjamin Herrenschmidtlitedram: Test bench
2020-06-05 Benjamin Herrenschmidtlitedram: Add an L2 cache with store queue
2020-06-05 Benjamin Herrenschmidtlitedram: Add simulation support
2020-06-03 Paul MackerrasMerge pull request #168 from shenki/flash-arty
2020-06-02 Anton BlanchardMerge pull request #184 from antonblanchard/verific
2020-05-23 Anton BlanchardMerge pull request #181 from antonblanchard/Makefile...
2020-05-23 Anton BlanchardPass clock frequency to UART sim wrapper
2020-05-21 Anton BlanchardMerge pull request #180 from antonblanchard/Makefile...
2020-05-20 Anton BlanchardA little less shouting in the Makefile
2020-05-20 Anton BlanchardFix the simulated DMI
2020-05-20 Anton BlanchardMerge Makefile and Makefile.synth
2020-05-20 Anton BlanchardAdd Makefile command line variables to enable docker...
2020-05-20 Anton BlanchardRework Makefile
2020-05-19 Anton BlanchardMerge pull request #173 from Jbalkind/core-vcs-syntax
2020-05-19 Anton BlanchardMerge pull request #177 from antonblanchard/litedram
2020-05-19 Anton BlanchardMerge branch 'master' into litedram
2020-05-19 Anton BlanchardMerge pull request #176 from antonblanchard/console...
2020-05-19 Anton BlanchardMerge pull request #174 from antonblanchard/yosys-fixes
2020-05-18 Anton BlanchardMerge pull request #169 from paulusmack/mmu
2020-05-15 Benjamin HerrenschmidtMakefile: Improve clean a bit
2020-05-14 Paul MackerrasMerge branch 'mmu'
2020-05-14 Anton BlanchardMerge pull request #170 from antonblanchard/litedram
2020-05-08 Benjamin Herrenschmidtsyscon: Add syscon registers
2020-05-08 Paul MackerrasAdd framework for implementing an MMU
2020-05-08 Benjamin Herrenschmidtlitedram: Add basic support for LiteX LiteDRAM
2020-05-06 Anton BlanchardMerge pull request #166 from paulusmack/master
2020-05-06 Paul MackerrasMerge remote-tracking branch 'remotes/origin/master'
2020-05-06 Anton BlanchardMerge pull request #165 from mikey/xics
2020-04-29 Paul MackerrasMakefile: fix typo
2020-04-28 Paul MackerrasPlumb insn_type through to loadstore1
2020-04-23 Anton BlanchardMerge pull request #164 from mikey/tags
2020-04-23 Michael NeulingXICS interrupt controller
2020-04-23 Michael NeulingAdd VHDL TAGS
2020-04-02 Anton BlanchardMerge pull request #155 from mikey/exceptions
2020-04-01 Michael NeulingAdd test cases for new exceptions and supervisor state
2020-03-30 Anton BlanchardMerge pull request #153 from paulusmack/master
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