git.libre-soc.org Git - yosys.git/history

2018-09-17	Udi Finkelstein	Merge branch 'master' into pr_reg_wire_error	tree \| commitdiff
2018-08-22	Jim Lawson	Merge pull request #1 from YosysHQ/master	tree \| commitdiff
2018-08-18	Aman Goel	Merge pull request #3 from YosysHQ/master	tree \| commitdiff
2018-08-15	Clifford Wolf	Merge pull request #573 from cr1901/msys-64	tree \| commitdiff
2018-08-15	Clifford Wolf	Merge pull request #591 from hzeller/virtual-override	tree \| commitdiff
2018-07-21	Henner Zeller	Consistent use of 'override' for virtual methods in...	tree \| commitdiff
2017-07-05	Clifford Wolf	Fix generation of multiple outputs for same AIG node...	tree \| commitdiff
2017-07-03	Clifford Wolf	Merge pull request #352 from rqou/master	tree \| commitdiff
2017-07-03	Clifford Wolf	Include output ports with constant driver in AIGER...	tree \| commitdiff
2017-05-30	Clifford Wolf	Fix AIGER back-end for multiple symbols per input/latch...	tree \| commitdiff
2017-05-28	Clifford Wolf	Improve write_aiger handling of unconnected nets and...	tree \| commitdiff
2017-03-02	Clifford Wolf	Add write_aiger $anyseq support	tree \| commitdiff
2017-02-25	Clifford Wolf	Merge branch 'master' of https://github.com/klammerj...	tree \| commitdiff
2017-02-25	Clifford Wolf	Merge branch 'master' of github.com:cliffordwolf/yosys	tree \| commitdiff
2017-02-25	Clifford Wolf	Add $live and $fair support to AIGER back-end.	tree \| commitdiff
2016-12-23	Andrew Zonenberg	Merge pull request #1 from azonenberg-hk/master	tree \| commitdiff
2016-12-12	Andrew Zonenberg	Merge https://github.com/cliffordwolf/yosys	tree \| commitdiff
2016-12-11	Clifford Wolf	Added $anyconst support to AIGER back-end	tree \| commitdiff
2016-12-03	Clifford Wolf	Added $assert/$assume support to AIGER back-end	tree \| commitdiff
2016-12-01	Clifford Wolf	Added "write_aiger -zinit -symbols -vmap"	tree \| commitdiff
2016-11-30	Clifford Wolf	Added "write_aiger" command	tree \| commitdiff

RSS Atom