Merge pull request #2485 from whitequark/cxxrtl-cell-input-buffering
[yosys.git] / backends / cxxrtl / cxxrtl_capi.h
2020-12-03 whitequarkMerge pull request #2470 from whitequark/cxxrtl-create_at
2020-12-03 whitequarkcxxrtl: allow customizing the root module path in the...
2020-12-02 whitequarkMerge pull request #2468 from whitequark/cxxrtl-assert
2020-12-02 whitequarkMerge pull request #2469 from whitequark/cxxrtl-no-clk
2020-12-02 whitequarkMerge pull request #2466 from whitequark/cxxrtl-reset
2020-12-02 whitequarkcxxrtl: provide a way to perform unobtrusive power...
2020-11-25 Claire XenMerge pull request #2133 from dh73/nodev_head
2020-11-24 Miodrag MilanovićMerge pull request #2295 from epfl-vlsc/firrtl_blackbox...
2020-09-17 clairexenMerge pull request #2329 from antmicro/arrays-fix-multi...
2020-09-17 clairexenMerge pull request #2330 from antmicro/arrays-fix-multi...
2020-09-10 Miodrag MilanovićMerge pull request #2369 from Xiretza/gitignores
2020-09-03 whitequarkMerge pull request #2371 from whitequark/cxxrtl-debug...
2020-09-02 whitequarkcxxrtl: expose driver kind in debug information.
2020-09-02 whitequarkcxxrtl: expose port direction in debug information.
2020-09-02 whitequarkcxxrtl: fix inaccuracy in CXXRTL_ALIAS documentation...
2020-08-19 clairexenMerge pull request #2122 from PeterCrozier/struct_array2
2020-07-16 clairexenMerge pull request #2229 from Ravenslofty/sf2_remove_sf...
2020-07-16 clairexenMerge pull request #2273 from whitequark/write-verilog...
2020-07-16 clairexenMerge pull request #2272 from whitequark/write-verilog-sv
2020-07-16 Miodrag MilanovićMerge pull request #2238 from YosysHQ/mwk/dfflegalize...
2020-07-16 Miodrag MilanovićMerge pull request #2226 from YosysHQ/mwk/nuke-efinix...
2020-07-16 whitequarkMerge pull request #2270 from whitequark/cxxrtl-fix...
2020-07-15 clairexenMerge pull request #2257 from antmicro/fix-conflicts
2020-07-14 whitequarkcxxrtl: fix typo. NFC.
2020-07-13 whitequarkMerge pull request #2263 from whitequark/cxxrtl-capi...
2020-07-12 whitequarkcxxrtl: expose eval() and commit() via the C API.
2020-07-02 clairexenMerge pull request #2132 from YosysHQ/eddie/verific_initial
2020-06-18 N. EngelhardtMerge pull request #2153 from boqwxp/splitnets-cleanup
2020-06-18 whitequarkMerge pull request #2142 from whitequark/splitnets...
2020-06-13 whitequarkMerge pull request #2151 from whitequark/cxxrtl-fix...
2020-06-13 whitequarkMerge pull request #2145 from whitequark/cxxrtl-splitnets
2020-06-11 whitequarkcxxrtl: handle multipart signals.
2020-06-11 whitequarkcxxrtl: expose RTLIL::{Wire,Memory}->start_offset in...
2020-06-10 whitequarkMerge pull request #2141 from whitequark/cxxrtl-cxx11
2020-06-10 whitequarkMerge pull request #2140 from whitequark/cxxrtl-aliases
2020-06-10 whitequarkcxxrtl: disambiguate values/wires and their aliases...
2020-06-09 clairexenMerge pull request #2112 from YosysHQ/claire/fix2040
2020-06-08 whitequarkMerge pull request #2121 from whitequark/cxxrtl-debug...
2020-06-08 whitequarkcxxrtl: emit debug information for constant wires.
2020-06-08 clairexenMerge pull request #2085 from rswarbrick/select
2020-06-08 clairexenMerge pull request #2089 from rswarbrick/modports
2020-06-08 clairexenMerge pull request #2105 from whitequark/split-flatten...
2020-06-06 whitequarkMerge pull request #2115 from whitequark/cxxrtl-introsp...
2020-06-06 whitequarkcxxrtl: add a C API for driving and introspecting designs.