git.libre-soc.org Git - yosys.git/history - backends/verilog/verilog

[yosys.git] / backends / verilog / verilog_backend.cc

2015-06-04	luke whittlesey	Bug fix in $mem verilog backend + changed tests/bram...	blob \| commitdiff \| raw
2015-05-22	Clifford Wolf	Merge branch 'master' of github.com:cliffordwolf/yosys	blob \| commitdiff \| raw \| diff to current
2015-05-20	Clifford Wolf	Some fixes for $mem in verilog back-end	blob \| commitdiff \| raw \| diff to current
2015-05-11	Clifford Wolf	Merge pull request #63 from wluker/verilog-backend-mem	blob \| commitdiff \| raw \| diff to current
2015-05-11	luke whittlesey	Fixed bug in $mem cell verilog code generation.	blob \| commitdiff \| raw \| diff to current
2015-05-10	Clifford Wolf	Disabled broken $mem support in verilog backend	blob \| commitdiff \| raw \| diff to current
2015-05-10	Clifford Wolf	Merge pull request #62 from wluker/verilog-backend-mem	blob \| commitdiff \| raw \| diff to current
2015-05-10	luke whittlesey	Made changes recommended by Clifford Wolf ...	blob \| commitdiff \| raw \| diff to current
2015-05-08	luke whittlesey	Verilog backend for $mem cells should now be able to...	blob \| commitdiff \| raw \| diff to current
2015-05-07	luke whittlesey	Added support for $mem cells in the verilog backend.	blob \| commitdiff \| raw \| diff to current
2015-04-09	Clifford Wolf	Minor fixes in handling of "init" attribute	blob \| commitdiff \| raw \| diff to current
2015-04-04	Clifford Wolf	Added "init" attribute support to verilog backend	blob \| commitdiff \| raw \| diff to current
2015-04-03	Ahmed Irfan	Merge branch 'master' of https://github.com/cliffordwol...	blob \| commitdiff \| raw \| diff to current
2015-03-18	Clifford Wolf	Added Verilog backend $dffsr support	blob \| commitdiff \| raw \| diff to current
2015-02-13	Clifford Wolf	Fixed "write_verilog -attr2comment" handling of "*...	blob \| commitdiff \| raw \| diff to current
2015-01-23	Clifford Wolf	Added dict/pool.sort()	blob \| commitdiff \| raw \| diff to current
2015-01-02	Clifford Wolf	Cosmetic changes in verilog output format	blob \| commitdiff \| raw \| diff to current
2014-12-26	Clifford Wolf	Replaced std::unordered_map as implementation for Yosys...	blob \| commitdiff \| raw \| diff to current
2014-12-26	Clifford Wolf	Added Yosys::{dict,nodict,vector} container types	blob \| commitdiff \| raw \| diff to current
2014-12-19	Clifford Wolf	Added $dffe support to write_verilog	blob \| commitdiff \| raw \| diff to current
2014-11-07	Clifford Wolf	Fixed generation of temp names in verilog backend	blob \| commitdiff \| raw \| diff to current
2014-10-10	Clifford Wolf	Renamed SIZE() to GetSize() because of name collision...	blob \| commitdiff \| raw \| diff to current
2014-09-27	Clifford Wolf	namespace Yosys	blob \| commitdiff \| raw \| diff to current
2014-09-22	Ahmed Irfan	Merge branch 'master' of https://github.com/cliffordwol...	blob \| commitdiff \| raw \| diff to current
2014-09-06	Clifford Wolf	Various bug fixes (related to $macc model testing)	blob \| commitdiff \| raw \| diff to current
2014-09-04	Clifford Wolf	Removed $bu0 cell type	blob \| commitdiff \| raw \| diff to current
2014-09-03	Clifford Wolf	Using $pos models for $bu0	blob \| commitdiff \| raw \| diff to current
2014-08-23	Clifford Wolf	Changed backend-api from FILE to std::ostream	blob \| commitdiff \| raw \| diff to current
2014-08-16	Clifford Wolf	Fixed AOI/OAI expr handling in verilog backend	blob \| commitdiff \| raw \| diff to current
2014-08-16	Clifford Wolf	Added additional gate types: $_NAND_ $_NOR_ $_XNOR_...	blob \| commitdiff \| raw \| diff to current
2014-08-15	Clifford Wolf	Renamed $_INV_ cell type to $_NOT_	blob \| commitdiff \| raw \| diff to current
2014-08-14	Clifford Wolf	Refactoring of CellType class	blob \| commitdiff \| raw \| diff to current
2014-08-02	Clifford Wolf	Be more conservative with printing decimal numbers...	blob \| commitdiff \| raw \| diff to current
2014-08-02	Clifford Wolf	Improved verilog output for ordinary $mux cells	blob \| commitdiff \| raw \| diff to current
2014-08-02	Clifford Wolf	More cleanups related to RTLIL::IdString usage	blob \| commitdiff \| raw \| diff to current
2014-07-31	Clifford Wolf	Renamed port access function on RTLIL::Cell, added...	blob \| commitdiff \| raw \| diff to current
2014-07-28	Clifford Wolf	Added support for "upto" wires to Verilog front- and...	blob \| commitdiff \| raw \| diff to current
2014-07-28	Clifford Wolf	Using log_assert() instead of assert()	blob \| commitdiff \| raw \| diff to current
2014-07-27	Clifford Wolf	Refactoring: Renamed RTLIL::Design::modules to modules_	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Refactoring: Renamed RTLIL::Module::cells to cells_	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Refactoring: Renamed RTLIL::Module::wires to wires_	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Added RTLIL::Cell::has(portname)	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Merge automatic and manual code changes for new cell...	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Manual fixes for new cell connections API	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Changed users of cell->connections_ to the new API...	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Renamed RTLIL::{Module,Cell}::connections to connections_	blob \| commitdiff \| raw \| diff to current
2014-07-25	Clifford Wolf	Various RTLIL::SigSpec related code cleanups	blob \| commitdiff \| raw \| diff to current
2014-07-23	Clifford Wolf	Removed RTLIL::SigSpec::optimize()	blob \| commitdiff \| raw \| diff to current
2014-07-22	Clifford Wolf	SigSpec refactoring: change RTLIL::SigSpec::chunks...	blob \| commitdiff \| raw \| diff to current
2014-07-22	Clifford Wolf	SigSpec refactoring: using the accessor functions every...	blob \| commitdiff \| raw \| diff to current
2014-07-22	Clifford Wolf	SigSpec refactoring: renamed chunks and width to __chun...	blob \| commitdiff \| raw \| diff to current
2014-07-20	Clifford Wolf	Use functions instead of always blocks for $mux/$pmux...	blob \| commitdiff \| raw \| diff to current
2014-07-19	Clifford Wolf	Added support for $bu0 to verilog backend	blob \| commitdiff \| raw \| diff to current
2014-02-07	Clifford Wolf	Added $slice and $concat cell types	blob \| commitdiff \| raw \| diff to current
2014-01-03	Ahmed Irfan	Merge branch 'master' of https://github.com/cliffordwol...	blob \| commitdiff \| raw \| diff to current
2013-12-27	Clifford Wolf	Added support for non-const === and !== (for miter...	blob \| commitdiff \| raw \| diff to current
2013-12-04	Clifford Wolf	Replaced signed_parameters API with CONST_FLAG_SIGNED	blob \| commitdiff \| raw \| diff to current
2013-12-04	Clifford Wolf	Replaced RTLIL::Const::str with generic decoder method	blob \| commitdiff \| raw \| diff to current
2013-11-24	Clifford Wolf	Added proper dumping of signed/unsigned parameters...	blob \| commitdiff \| raw \| diff to current
2013-11-22	Clifford Wolf	Renamed "placeholder" to "blackbox"	blob \| commitdiff \| raw \| diff to current
2013-11-21	Clifford Wolf	Implemented $_DFFSR_ expression generator in verilog...	blob \| commitdiff \| raw \| diff to current
2013-11-03	Clifford Wolf	Write yosys version to output files	blob \| commitdiff \| raw \| diff to current
2013-10-24	Clifford Wolf	Fixed handling of boolean attributes (backends)	blob \| commitdiff \| raw \| diff to current
2013-10-24	Clifford Wolf	Fixed handling of boolean attributes (kernel)	blob \| commitdiff \| raw \| diff to current
2013-10-18	Clifford Wolf	Added $_SR_[PN][PN]_, $_DFFSR_[PN][PN][PN]_, $_DLATCH_...	blob \| commitdiff \| raw \| diff to current
2013-10-18	Clifford Wolf	Added $sr, $dffsr and $dlatch cell types	blob \| commitdiff \| raw \| diff to current
2013-09-03	Clifford Wolf	Merge branch 'master' of github.com:cliffordwolf/yosys	blob \| commitdiff \| raw \| diff to current
2013-09-03	Clifford Wolf	Added -selected option to various backends	blob \| commitdiff \| raw \| diff to current
2013-08-22	Clifford Wolf	More explicit integer output in verilog backend	blob \| commitdiff \| raw \| diff to current
2013-05-16	Clifford Wolf	Merge branch 'bugfix'	blob \| commitdiff \| raw \| diff to current
2013-03-28	Clifford Wolf	Implemented proper handling of stub placeholder modules	blob \| commitdiff \| raw \| diff to current
2013-03-21	Clifford Wolf	Avoid verilog-2k in verilog backend	blob \| commitdiff \| raw \| diff to current
2013-03-14	Clifford Wolf	More support code for $sr cells	blob \| commitdiff \| raw \| diff to current
2013-03-03	Clifford Wolf	Fixed a gcc compiler warning [-Wparentheses]	blob \| commitdiff \| raw \| diff to current
2013-02-28	Clifford Wolf	Added more help messages	blob \| commitdiff \| raw \| diff to current
2013-01-05	Clifford Wolf	initial import	blob \| commitdiff \| raw \| diff to current

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