print cell name for properties in yosys-smtbmc
[yosys.git] / backends / verilog /
2020-04-02 Claire WolfMerge pull request #1765 from YosysHQ/claire/btor_info
2020-04-01 Eddie HungMerge pull request #1828 from YosysHQ/eddie/celltypes_s...
2020-04-01 Eddie HungMerge pull request #1790 from YosysHQ/eddie/opt_expr_xor
2020-04-01 Eddie HungMerge pull request #1789 from YosysHQ/eddie/opt_expr_alu
2020-04-01 David ShahMerge pull request #1844 from YosysHQ/dave/gen-source-loc
2020-04-01 Eddie HungMerge pull request #1852 from boqwxp/cleanup_synth_ice40
2020-04-01 Eddie HungMerge pull request #1849 from boqwxp/cleanup_kernel_yosys
2020-04-01 Eddie HungMerge pull request #1850 from boqwxp/cleanup_backends
2020-04-01 Alberto GonzalezClean up pseudo-private member usage in `backends/veril...
2020-03-27 Claire WolfMerge pull request #1607 from whitequark/simplify-simpl...
2020-03-12 Miodrag MilanovićMerge pull request #1666 from Xiretza/improve-makefile
2020-03-03 N. EngelhardtMerge pull request #1691 from ZirconiumX/use-flowmap...
2020-03-03 Claire WolfMerge pull request #1681 from YosysHQ/eddie/fix1663
2020-03-03 Claire WolfMerge pull request #1519 from YosysHQ/eddie/submod_po
2020-02-27 Claire WolfMerge pull request #1709 from rqou/coolrunner2_counter
2020-02-27 Claire WolfMerge pull request #1708 from rqou/coolrunner2-buf-fix
2020-02-26 Miodrag MilanovićMerge pull request #1705 from YosysHQ/logger_pass
2020-02-21 Eddie HungMerge pull request #1703 from YosysHQ/eddie/specify_improve
2020-02-20 Claire WolfMerge pull request #1642 from jjj11x/jjj11x/sv-enum
2020-02-13 Eddie Hungspecify: system timing checks to accept min:typ:max...
2020-02-13 N. EngelhardtMerge pull request #1679 from thasti/delay-parsing
2020-02-10 Eddie HungMerge pull request #1670 from rodrigomelo9/master
2020-02-10 N. EngelhardtMerge pull request #1669 from thasti/pyosys-attrs
2020-02-07 Eddie HungMerge pull request #1685 from dh73/gowin
2020-02-07 whitequarkMerge pull request #1683 from whitequark/write_verilog...
2020-02-06 whitequarkwrite_verilog: dump $mem cell attributes.
2020-01-29 Claire WolfMerge branch 'vector_fix' of https://github.com/Kmanfi...
2019-12-16 Eddie HungMerge pull request #1577 from gromero/for-yosys
2019-11-22 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-11-19 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-11-19 Clifford WolfMerge pull request #1449 from pepijndevos/gowin
2019-11-18 Clifford WolfMerge pull request #1497 from YosysHQ/mwk/extract-fa-fix
2019-11-18 whitequarkMerge pull request #1494 from whitequark/write_verilog...
2019-11-18 whitequarkwrite_verilog: add -extmem option, to write split memor...
2019-11-14 Clifford WolfMerge pull request #1444 from btut/feature/python_wrapp...
2019-11-14 Clifford WolfMerge pull request #1465 from YosysHQ/dave/ice40_timing_sim
2019-11-11 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ...
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog...
2019-09-27 Aman GoelMerge pull request #7 from YosysHQ/master
2019-09-22 whitequarkwrite_verilog: do not print (*init*) attributes on...
2019-08-26 Clifford WolfMerge tag 'yosys-0.9'
2019-08-25 Clifford WolfMerge pull request #1112 from acw1251/pyosys_sigsig_issue
2019-08-22 Clifford WolfMerge pull request #1281 from mmicko/efinix
2019-08-20 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-16 Eddie HungMerge branch 'eddie/abc9_refactor' into xaig_dff
2019-08-16 Eddie HungMerge pull request #1250 from bwidawsk/master
2019-08-16 Eddie HungMerge https://github.com/bogdanvuk/yosys into bogdanvuk...
2019-08-12 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-08-12 Serge BazanskiMerge pull request #1152 from 1138-4EB/feat-docker
2019-08-12 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-10 Clifford WolfMerge pull request #1258 from YosysHQ/eddie/cleanup
2019-08-09 Miodrag MilanovicMerge remote-tracking branch 'upstream/master' into...
2019-08-08 David ShahMerge branch 'xc7dsp' of github.com:YosysHQ/yosys into...
2019-08-07 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-08-07 Eddie Hungsubstr() -> compare()
2019-08-07 Eddie HungRTLIL::S{0,1} -> State::S{0,1}
2019-08-07 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-07 Jim LawsonMerge branch 'master' into firrtl_err_on_unsupported_cell
2019-08-07 Clifford WolfMerge pull request #1240 from ucb-bar/firrtl-properties...
2019-08-07 Clifford WolfMerge pull request #1249 from mmicko/anlogic_fix
2019-08-07 David ShahMerge pull request #1241 from YosysHQ/clifford/jsonfix
2019-08-06 Eddie HungUse State::S{0,1}
2019-08-06 Eddie HungMake liberal use of IdString.in()
2019-08-06 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-06 Clifford WolfMerge pull request #1251 from YosysHQ/clifford/nmux
2019-08-06 Clifford WolfAdd $_NMUX_, add "abc -g cmos", add proper cmos cell...
2019-07-25 Eddie HungMerge pull request #1224 from YosysHQ/xilinx_fix_ff
2019-07-24 Jim LawsonMerge remote-tracking branch 'upstream/master'
2019-07-19 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-07-18 Eddie HungMerge remote-tracking branch 'origin/master' into ice40dsp
2019-07-18 Clifford WolfMerge pull request #1184 from whitequark/synth-better...
2019-07-18 Clifford WolfMerge pull request #1203 from whitequark/write_verilog...
2019-07-17 Clifford WolfRemove old $pmux_safe code from write_verilog
2019-07-16 whitequarkwrite_verilog: dump zero width constants correctly.
2019-07-15 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-07-15 Eddie HungMerge branch 'master' into eddie/fix1178
2019-07-11 Clifford WolfMerge pull request #1172 from whitequark/write_verilog...
2019-07-10 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-07-10 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-07-10 Eddie HungMerge pull request #1148 from YosysHQ/xc7mux
2019-07-10 Clifford WolfMerge pull request #1177 from YosysHQ/clifford/async
2019-07-09 Clifford WolfMerge pull request #1175 from whitequark/write_verilog...
2019-07-09 Clifford WolfMerge pull request #1174 from YosysHQ/eddie/fix1173
2019-07-09 Clifford WolfMerge pull request #1175 from whitequark/write_verilog...
2019-07-09 whitequarkwrite_verilog: fix placement of case attributes. NFC.
2019-07-09 whitequarkwrite_verilog: write RTLIL::Sa aka - as Verilog ?.
2019-07-09 Clifford WolfMerge pull request #1163 from whitequark/more-case...
2019-07-09 Eddie HungMerge pull request #1170 from YosysHQ/eddie/fix_double_...
2019-07-09 Eddie HungMerge remote-tracking branch 'origin/master' into xc7mux
2019-07-09 Clifford WolfMerge pull request #1168 from whitequark/bugpoint-processes
2019-07-09 Clifford WolfMerge pull request #1169 from whitequark/more-proc...
2019-07-09 Clifford WolfMerge pull request #1163 from whitequark/more-case...
2019-07-08 whitequarkverilog_backend: dump attributes on SwitchRule.
2019-07-08 whitequarkverilog_backend: dump attributes on CaseRule, as comments.
2019-06-26 Eddie HungMerge branch 'xc7nocarrymux' of https://github.com...
2019-06-13 Serge BazanskiMerge pull request #829 from abdelrahmanhosny/master
2019-06-12 Eddie HungMerge remote-tracking branch 'origin/master' into xaig
2019-06-07 Clifford WolfMerge branch 'pr_elab_sys_tasks' of https://github...
2019-05-31 Eddie HungMerge branch 'xaig' into xc7mux
2019-05-21 Eddie HungMerge remote-tracking branch 'origin/master' into xc7mux
next