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Fixes for simple_abc9 tests
[yosys.git] / backends /
2019-04-19 Eddie HungFixes for simple_abc9 tests tree | commitdiff
2019-04-19 Eddie HungDo not assume inst_module is always present tree | commitdiff
2019-04-19 Eddie Hungignore_boxes -> holes_mode tree | commitdiff
2019-04-19 Eddie HungAdd flop support for write_xaiger tree | commitdiff
2019-04-19 Eddie HungSpelling tree | commitdiff
2019-04-18 Eddie HungUse new -wb flag for ABC flow tree | commitdiff
2019-04-18 Eddie Hungwrite_json to not write contents (cells/wires) of white... tree | commitdiff
2019-04-18 Eddie HungMerge remote-tracking branch 'origin/clifford/whitebox... tree | commitdiff
2019-04-18 Clifford WolfAdd "whitebox" attribute, add "read_verilog -wb" tree | commitdiff
2019-04-17 Eddie HungFix $anyseq warning and cleanup tree | commitdiff
2019-04-17 Eddie HungCope with inout ports tree | commitdiff
2019-04-17 Eddie HungStop topological sort at abc_flop_q tree | commitdiff
2019-04-17 Eddie HungRemove init* from xaiger, also topo-sort cells for... tree | commitdiff
2019-04-17 Eddie HungMerge remote-tracking branch 'origin/master' into xaig tree | commitdiff
2019-04-17 Eddie HungOptimise tree | commitdiff
2019-04-16 Eddie HungCIs before PIs; also sort each cell's connections befor... tree | commitdiff
2019-04-16 Eddie HungMerge remote-tracking branch 'origin/master' into xaig tree | commitdiff
2019-04-16 Eddie HungPort from xc7mux branch tree | commitdiff
2019-04-16 Eddie HungMerge remote-tracking branch 'origin/master' into xaig tree | commitdiff
2019-04-13 Eddie HungOutput __const0__ and __const1__ CIs tree | commitdiff
2019-04-13 Eddie HungMerge branch 'xaig' of github.com:YosysHQ/yosys into... tree | commitdiff
2019-04-12 Eddie HungMerge branch 'xaig' of github.com:YosysHQ/yosys into... tree | commitdiff
2019-04-12 Eddie HungMerge remote-tracking branch 'origin/master' into xaig tree | commitdiff
2019-04-12 Eddie Hungci_bits and co_bits now a list, order is important... tree | commitdiff
2019-04-12 Eddie HungWIP tree | commitdiff
2019-04-12 Eddie HungMerge remote-tracking branch 'origin/master' into xaig tree | commitdiff
2019-04-11 Eddie HungAdd non-input bits driven by unrecognised cells as... tree | commitdiff
2019-04-08 Eddie HungMerge branch 'master' into xaig tree | commitdiff
2019-04-03 Clifford WolfMerge pull request #912 from YosysHQ/bram_addr_en tree | commitdiff
2019-04-03 Clifford WolfMerge pull request #910 from ucb-bar/memupdates tree | commitdiff
2019-04-01 Jim LawsonRefine memory support to deal with general Verilog... tree | commitdiff
2019-03-23 Clifford WolfMerge pull request #893 from YosysHQ/clifford/btormeminit tree | commitdiff
2019-03-23 Clifford WolfAdd support for memory initialization to write_btor tree | commitdiff
2019-03-23 Clifford WolfFix BTOR output tags syntax in writye_btor tree | commitdiff
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger tree | commitdiff
2019-03-14 Clifford WolfMerge pull request #875 from YosysHQ/clifford/mutate tree | commitdiff
2019-03-14 Clifford WolfFix smtbmc.py handling of zero appended steps tree | commitdiff
2019-03-14 Clifford WolfMerge pull request #872 from YosysHQ/clifford/pmuxfix tree | commitdiff
2019-03-14 Clifford WolfFix a syntax bug in ilang backend related to process... tree | commitdiff
2019-03-14 Clifford WolfMerge pull request #869 from cr1901/win-shell tree | commitdiff
2019-03-13 William D. JonesInstall launcher executable when running yosys-smtbmc... tree | commitdiff
2019-03-13 Clifford WolfMerge pull request #868 from YosysHQ/clifford/fixmem tree | commitdiff
2019-03-12 Clifford WolfMerge pull request #866 from YosysHQ/clifford/idstuff tree | commitdiff
2019-03-11 Clifford WolfImprove determinism of IdString DB for similar scripts tree | commitdiff
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit tree | commitdiff
2019-03-09 Clifford WolfFix signed $shift/$shiftx handling in write_smt2 tree | commitdiff
2019-03-09 Clifford WolfMerge pull request #858 from YosysHQ/clifford/svalabels tree | commitdiff
2019-03-07 Clifford WolfUse SVA label in smt export if available tree | commitdiff
2019-03-05 Clifford WolfMerge pull request #842 from litghost/merge_upstream tree | commitdiff
2019-03-05 Clifford WolfMerge pull request #850 from daveshah1/ecp5_warn_conflict tree | commitdiff
2019-03-05 Clifford WolfMerge pull request #851 from kprasadvnsi/master tree | commitdiff
2019-03-05 Clifford WolfMerge pull request #852 from ucb-bar/firrtlfixes tree | commitdiff
2019-03-04 Jim LawsonEnsure fid() calls make_id() for consistency; tests... tree | commitdiff
2019-03-01 Clifford WolfFix "write_edif -gndvccy" tree | commitdiff
2019-03-01 Clifford WolfMerge pull request #836 from elmsfu/ice40_2bit_ram_rw_mode tree | commitdiff
2019-02-28 Clifford WolfMerge pull request #834 from YosysHQ/clifford/siminit tree | commitdiff
2019-02-28 Clifford WolfAdd "write_verilog -siminit" tree | commitdiff
2019-02-28 Larry DoolittleReduce amount of trailing whitespace in code base tree | commitdiff
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve tree | commitdiff
2019-02-28 Clifford WolfMerge pull request #827 from ucb-bar/firrtlfixes tree | commitdiff
2019-02-28 Clifford WolfMerge pull request #833 from YosysHQ/clifford/fix831 tree | commitdiff
2019-02-28 Clifford WolfFix smt2 code generation for partially initialized... tree | commitdiff
2019-02-26 Eddie HungMerge remote-tracking branch 'origin/master' into xaig tree | commitdiff
2019-02-26 Eddie Hungwrite_xaiger to behave for undriven/unused inouts tree | commitdiff
2019-02-26 Eddie Hungwrite_xaiger duplicate inout port into out port with... tree | commitdiff
2019-02-26 Jim LawsonFix FIRRTL to Verilog process instance subfield assignment. tree | commitdiff
2019-02-25 Eddie HungCleanup abc9 code tree | commitdiff
2019-02-24 Clifford WolfMerge pull request #812 from ucb-bar/arrayhierarchyfixes tree | commitdiff
2019-02-22 Eddie Hungwrite_xaiger to write __dummy_o__ for -symbols too tree | commitdiff
2019-02-22 Clifford WolfMerge pull request #740 from daveshah1/improve_dress tree | commitdiff
2019-02-21 Eddie HungAdd attribution tree | commitdiff
2019-02-21 Eddie HungMerge branch 'read_aiger' into xaig tree | commitdiff
2019-02-21 Eddie HungMerge branch 'read_aiger' into xaig tree | commitdiff
2019-02-21 Eddie HungMerge remote-tracking branch 'origin/master' into xaig tree | commitdiff
2019-02-21 Eddie Hungwrite_xaiger to use original bit for co, not sigmap... tree | commitdiff
2019-02-21 Clifford WolfMerge pull request #786 from YosysHQ/pmgen tree | commitdiff
2019-02-21 Eddie HungMerge branch 'clifford/dffsrfix' of https://github... tree | commitdiff
2019-02-21 Eddie HungRemove swap file tree | commitdiff
2019-02-20 Eddie Hungwrite_aiger: fix CI/CO and symbols tree | commitdiff
2019-02-20 Eddie Hungwrite_xaiger to not write latches, CO/PO fixes tree | commitdiff
2019-02-19 Eddie HungMerge branch 'master' into xaig tree | commitdiff
2019-02-19 Eddie HungMerge branch 'master' into read_aiger tree | commitdiff
2019-02-19 Eddie HungMerge pull request #805 from eddiehung/dff_init tree | commitdiff
2019-02-18 Eddie HungMerge branch 'dff_init' into read_aiger tree | commitdiff
2019-02-17 Eddie HungInstead of INIT param on cells, use initial statement... tree | commitdiff
2019-02-17 Eddie HungMerge https://github.com/YosysHQ/yosys into dff_init tree | commitdiff
2019-02-17 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger tree | commitdiff
2019-02-17 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into... tree | commitdiff
2019-02-17 Clifford WolfMerge pull request #811 from ucb-bar/firrtlfixes tree | commitdiff
2019-02-17 Eddie HungCleanup tree | commitdiff
2019-02-17 Eddie HungCleanup tree | commitdiff
2019-02-17 Eddie Hungwrite_xaiger to support non-bit cell connections, and... tree | commitdiff
2019-02-17 Eddie Hungwrite_aiger -O to write dummy output as __dummy_o__ tree | commitdiff
2019-02-16 Eddie HungTidy up write_xaiger tree | commitdiff
2019-02-16 Eddie Hungwrite_aiger() to perform CI/CO post-processing and... tree | commitdiff
2019-02-15 Eddie HungFixes needed for DFF circuits tree | commitdiff
2019-02-15 Jim LawsonRemoved unused variables, functions. tree | commitdiff
2019-02-15 Eddie Hungwrite_xaiger to cope with unknown cells by transforming... tree | commitdiff
2019-02-15 Jim LawsonUpdate cells supported for verilog to FIRRTL conversion. tree | commitdiff
2019-02-14 Eddie HungMore cleanup tree | commitdiff
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