Add $allconst and $allseq cell types
[yosys.git] / backends /
2018-02-20 Clifford WolfAdd support for mockup clock signals in yosys-smtbmc...
2018-02-08 Clifford WolfFix handling of zero-length cell connections in SMT2...
2018-02-03 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2018-02-03 Clifford WolfMerge pull request #488 from azonenberg/for_clifford
2018-02-03 Clifford WolfFixed gcc 7.2 "statement will never be executed" warning
2018-01-29 Clifford WolfFix smtio.py for large SMT2 S-expressions
2018-01-18 Clifford WolfMove user-provided smt2 info stmts to the top of the...
2017-12-24 Clifford WolfAdd "no driver for signal bit" error msg to btor back-end
2017-12-17 Clifford WolfSimple fix BTOR memory encoding
2017-12-17 Clifford WolfImprove BTOR memory encoding
2017-12-15 Clifford WolfMerge branch 'btor-ng'
2017-12-15 Clifford WolfAdd array support to btor back-end
2017-12-14 Clifford WolfAdd $anyconst/$anyseq support to btor back-end
2017-12-14 Clifford WolfMerge branch 'master' into btor-ng
2017-12-14 Clifford WolfAdd yosys-smtbmc VCD writer support for memories with...
2017-12-14 Clifford WolfMerge branch 'master' into btor-ng
2017-12-14 Clifford WolfAdd smt2 back-end support for async write memories
2017-12-12 Clifford WolfAdd "write_btor -s" mode
2017-12-12 Clifford WolfAdd state initval handling to btor back-end
2017-12-12 Clifford WolfAdd btor back-end support for 'x' constants
2017-12-11 Clifford WolfAdd btor $shift/$shiftx support
2017-12-10 Clifford WolfFix btor back-end shift handling
2017-12-10 Clifford WolfAdd support for $pmux in btor back-end
2017-12-10 Clifford WolfAdd support for more cell types to btor back-end
2017-12-10 Clifford WolfMerge branch 'master' into btor-ng
2017-12-09 Clifford WolfFix btor concat
2017-12-09 Clifford WolfMerge branch 'master' into btor-ng
2017-12-01 Clifford WolfMerge branch 'master' into btor-ng
2017-11-28 Clifford WolfMerge pull request #462 from daveshah1/up5k
2017-11-27 Clifford WolfMerge branch 'master' into btor-ng
2017-11-27 Clifford WolfFixed "yosys-smtbmc -g" handling of no solution
2017-11-27 Clifford WolfFixed "yosys-smtbmc -g" handling of no solution
2017-11-24 Clifford WolfMerge branch 'master' into btor-ng
2017-11-24 Clifford WolfBugfixes in new BTOR back-end
2017-11-24 Clifford WolfMerge pull request #446 from mithro/travis-rework
2017-11-23 Clifford WolfProgress in new BTOR back-end
2017-11-23 Clifford WolfProgress in new BTOR back-end
2017-11-23 Clifford WolfProgress in new BTOR back-end
2017-11-23 Clifford WolfMerge branch 'master' into btor-ng
2017-11-23 Clifford WolfProgress with new BTOR backend
2017-11-23 Clifford WolfAdd skeleton for new BTOR back-end
2017-11-23 Clifford WolfRemove old BTOR back-end
2017-11-09 dh73Merge https://github.com/cliffordwolf/yosys
2017-10-29 Clifford WolfFix SMT2 handling of initstate in sub-modules
2017-10-25 Clifford WolfImprove smtio performance by using reader thread, not...
2017-10-25 Clifford WolfUse separate writer thread for talking to SMT solver...
2017-10-25 Clifford WolfImprove p_* functions in smtio.py
2017-10-25 Clifford WolfCapsulate smt-solver read/write in separate functions
2017-10-25 Clifford WolfFix a bug in yosys-smtbmc in ROM handling
2017-10-10 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2017-10-07 Clifford WolfAdd $shiftx support to verilog front-end
2017-10-03 Clifford WolfMerge branch 'pr_ast_const_funcs' of https://github...
2017-10-03 Clifford WolfMerge branch 'fix_shift_reduce_conflict' of https:...
2017-10-03 Clifford WolfMerge branch 'dh73-master'
2017-10-03 Clifford WolfRename "write_verilog -nobasenradix" to "write_verilog...
2017-10-01 dh73Fixed wrong declaration in Verilog backend
2017-10-01 dh73Adding Cyclone IV (E, GX), Arria 10, Cyclone V and...
2017-08-25 Clifford WolfMerge branch 'extract_fa'
2017-08-25 Clifford WolfFix bug in write_smt2 (export logic driving hierarchica...
2017-08-04 Clifford WolfAdd "yosys-smtbmc --smtc-init --smtc-top --noinit"
2017-07-21 Clifford WolfAdd verilator support to testbenches generated by yosys...
2017-07-12 Clifford WolfGenerate FSM-style testbenches in smtbmc
2017-07-11 Clifford WolfFix the fixed handling of x-bits in EDIF back-end
2017-07-11 Clifford WolfFix handling of x-bits in EDIF back-end
2017-07-10 Clifford WolfAdd attributes and parameter support to JSON front-end
2017-07-07 Clifford WolfChange s/asserts/assertions/ in yosys-smtbmc log messages
2017-07-07 Clifford WolfAdd "yosys-smtbmc --presat"
2017-07-05 Clifford WolfFix generation of multiple outputs for same AIG node...
2017-07-05 Clifford WolfAdd write_table command
2017-07-03 Clifford WolfMerge pull request #352 from rqou/master
2017-07-03 Clifford WolfRemove unneeded delays in smtbmc vlogtb
2017-07-03 Clifford WolfInclude output ports with constant driver in AIGER...
2017-07-01 Clifford WolfAdd "yosys-smtbmc --vlogtb-top"
2017-07-01 Clifford WolfFix smtbmc vlogtb bug in $anyseq handling
2017-06-07 Clifford WolfFix generation of vlogtb output in yosys-smtbmc for...
2017-05-30 Clifford WolfFix AIGER back-end for multiple symbols per input/latch...
2017-05-28 Clifford WolfImprove write_aiger handling of unconnected nets and...
2017-05-27 Clifford WolfChange default smt2 solver to yices (Yices 2 has switch...
2017-05-23 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2017-05-17 Clifford WolfAdd workaround for CBMC bug to SimpleC back-end
2017-05-17 Clifford WolfAdd $_ANDNOT_ and $_ORNOT_ gates
2017-05-16 Clifford WolfAdd <modname>_init() function generator to simpleC...
2017-05-16 Clifford WolfImprove simplec back-end
2017-05-15 Clifford WolfImprove simplec back-end
2017-05-14 Clifford WolfImprove simplec back-end
2017-05-13 Clifford WolfImprove simplec back-end
2017-05-12 Clifford WolfImprove simplec back-end
2017-05-12 Clifford WolfAdded support for more gate types to simplec back-end
2017-05-12 Clifford WolfAdd first draft of simple C back-end
2017-05-08 Clifford WolfFix boolector support in yosys-smtbmc
2017-03-20 Clifford WolfAdd "write_smt2 -stdt" mode
2017-03-19 Clifford WolfAdd generation of logic cells to EDIF back-end runtest.py
2017-03-19 Clifford WolfFix EDIF: portRef member 0 is always the MSB bit
2017-03-18 Clifford WolfAdd simple EDIF test case generator and checker
2017-03-04 Clifford WolfImprove smt2 encodings of assert/assume/cover, better...
2017-03-02 Clifford WolfAdd write_aiger $anyseq support
2017-02-28 Clifford WolfUse hex addresses in smtbmc vcd mem traces
2017-02-26 Clifford WolfAdd smtbmc support for memory vcd dumping
2017-02-26 Clifford WolfFix extra newline bug in write_smt2
2017-02-26 Clifford WolfFix bug in smtio unroll code
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